peteasa / parallellaLinks
START HERE! FPGA and Linux Development Combined
☆23Updated 8 years ago
Alternatives and similar repositories for parallella
Users that are interested in parallella are comparing it to the libraries listed below
Sorting:
- Sample minimal Vivado project for Parallella FPGA☆44Updated 9 years ago
- Open Processor Architecture☆26Updated 9 years ago
- FPGA Development for the parallella☆19Updated 7 years ago
- A Simple to use build environment for parallella using yocto☆13Updated 3 weeks ago
- a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially☆40Updated 9 years ago
- a playground for xilinx zynq fpga experiments☆49Updated 6 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated 2 weeks ago
- SoC design for Milkymist One - LM32, DDR SDRAM, 2D TMU, PFPU☆151Updated 11 years ago
- ☆65Updated 9 years ago
- mirror of https://git.elphel.com/Elphel/x393☆40Updated 2 years ago
- VexRiscv-SMP integration test with LiteX.☆25Updated 4 years ago
- A reconfigurable and extensible VLIW processor implemented in VHDL☆34Updated 10 years ago
- LIB:Library for interacting with an FPGA over USB☆84Updated 4 years ago
- Untethered (stand-alone) FPGA implementation of the lowRISC SoC☆56Updated 5 years ago
- ☆64Updated 6 years ago
- Tools and Examples for IcoBoard☆80Updated 4 years ago
- Parallel Array of Simple Cores. Multicore processor.☆100Updated 6 years ago
- LatticeMico32 soft processor☆106Updated 10 years ago
- ReconOS - Operating System for Reconfigurable Hardware☆29Updated 3 years ago
- Repository and Wiki for Chip Hack events.☆51Updated 3 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- Z-scale Microarchitectural Implementation of RV32 ISA☆55Updated 8 years ago
- AXI MIPI CSI2 RX FPGA core and kernel driver☆8Updated 10 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Updated 2 years ago
- Generic Logic Interfacing Project☆46Updated 4 years ago
- Yosys Plugins☆21Updated 6 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆65Updated this week
- that FPGA flow☆9Updated 9 years ago
- FPGA 101 - Workshop materials☆76Updated 6 years ago
- A collection of MyHDL cores and tools for complex digital circuit design☆86Updated 6 years ago