merledu / OpenTCAMLinks
An open-source Ternary Content Addressable Memory (TCAM) compiler.
☆29Updated last year
Alternatives and similar repositories for OpenTCAM
Users that are interested in OpenTCAM are comparing it to the libraries listed below
Sorting:
- TCAM (Ternary Content-Addressable Memory) in Verilog☆53Updated 2 years ago
- Verilog Content Addressable Memory Module☆113Updated 3 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆37Updated 2 years ago
- ☆78Updated 10 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆43Updated 4 years ago
- RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores☆90Updated last month
- BlackParrot on Zynq☆47Updated this week
- Project repo for the POSH on-chip network generator☆50Updated 6 months ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆89Updated last year
- ☆15Updated 3 years ago
- ☆67Updated 4 years ago
- AXI3 Bus Functional Models (Initiator & Target)☆29Updated 2 years ago
- A SytemVerilog implementation of Cyclic Redundancy Check runs at up to Terabits per second☆16Updated last year
- General Purpose AXI Direct Memory Access☆59Updated last year
- native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches☆46Updated 10 years ago
- A simple DDR3 memory controller☆60Updated 2 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆67Updated 5 years ago
- ☆27Updated last year
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆78Updated 4 years ago
- SRAM☆22Updated 5 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆72Updated 9 months ago
- Proposed RISC-V Composable Custom Extensions Specification☆71Updated 3 months ago
- OPAE porting to Xilinx FPGA devices.☆39Updated 5 years ago
- sram/rram/mram.. compiler☆42Updated 2 years ago
- ☆67Updated 2 years ago
- Open source FPGA-based NIC and platform for in-network compute☆66Updated last month
- Open source RTL simulation acceleration on commodity hardware☆29Updated 2 years ago
- Open source process design kit for 28nm open process☆61Updated last year
- Simple single-port AXI memory interface☆46Updated last year
- Ethernet switch implementation written in Verilog☆54Updated 2 years ago