Alternatives and similar repositories for VLSI_Lab2:

Users that are interested in VLSI_Lab2 are comparing it to the libraries listed below

• mediaic / VLSI_Lab1
  RTL + Synthesis + APR
  ☆11Updated last year
• naragece / uvm-testbench-tutorial-simple-adder
  A basic testbench made for educational purposes using SystemVerilog and the Universal Verification Methodology
  ☆101Updated 11 years ago
• ic7x24 / verilog-mini-demo
  Verilog极简教程
  ☆36Updated 6 years ago
• VerificationExcellence / UVMReference
  Reference examples and short projects using UVM Methodology
  ☆264Updated 2 years ago
• mediaic / Crash_Course_for_New_Members
  Deep Learning & VLSI Crash Course for New Members
  ☆37Updated 8 months ago
• Ni-ChiTing / IC_contest_cell_based_design
  ☆12Updated 3 years ago
• zli87 / Integrated_Circuit_Design_Laboratory_IC_Lab
  Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.
  ☆23Updated 3 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-Step-By-Step
  This is the main repository for all the examples for the book Practical UVM
  ☆187Updated 4 years ago
• funningboy / uvm_axi
  uvm AXI BFM(bus functional model)
  ☆244Updated 11 years ago
• freechipsproject / chisel-testers
  Provides various testers for chisel users
  ☆100Updated 2 years ago
• ucb-bar / dsptools
  A Library of Chisel3 Tools for Digital Signal Processing
  ☆234Updated 11 months ago
• akzare / Async_FIFO_Verification
  Presents a verification use case for a typical Asynchronous FIFO based on Systemverilog and UVM.
  ☆49Updated 4 years ago
• yutongshen / RISC-V_SoC
  ☆35Updated last year
• Siddhi-95 / AHB-to-APB-Bridge-Verification
  Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.
  ☆88Updated last year
• HsuChiChen / nycu-iclab-2023-fall
  交通大學iclab 2023 fall
  ☆28Updated 6 months ago
• gupta409 / Processor-UVM-Verification
  System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment
  ☆101Updated 3 months ago
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆75Updated 2 years ago
• adibis / DDR2_Controller
  DDR2 memory controller written in Verilog
  ☆77Updated 13 years ago
• cluelogic / uvm-tutorial-for-candy-lovers
  Source code repo for UVM Tutorial for Candy Lovers
  ☆185Updated 7 years ago
• amamory-verification / uvm-basics
  my UVM training projects
  ☆32Updated 6 years ago
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆120Updated 3 years ago
• nachumk / systemverilog.vim
  SystemVerilog vim scripts
  ☆65Updated 2 years ago
• courageheart / AMBA_APB_SRAM
  AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…
  ☆167Updated 6 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆56Updated 4 years ago
• nelsoncsc / ISP_UVM
  A Framework for Design and Verification of Image Processing Applications using UVM
  ☆96Updated 7 years ago
• amiq-consulting / amiq_apb
  SystemVerilog VIP for AMBA APB protocol
  ☆72Updated 3 years ago
• alexforencich / cocotbext-axi
  AXI interface modules for Cocotb
  ☆252Updated last year
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆113Updated 7 years ago
• VerificationExcellence / SystemVerilogAssertions
  Examples and reference for System Verilog Assertions
  ☆83Updated 8 years ago
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆64Updated 5 years ago