Alternatives and similar repositories for EE5175_ImageSignalProcessing

Users that are interested in EE5175_ImageSignalProcessing are comparing it to the libraries listed below

• ash-aldujaili / spatial-filter-hdl
  High Throughput Image Filters on FPGAs
  ☆14Updated 8 years ago
• 10x-Engineers / Infinite-ISP_ReferenceModel
  A Python based fixed-point implementation of the Infinite-ISP design for ASIC and FPGA design and verification.
  ☆33Updated 8 months ago
• lileilei-camera / isp
  open cv software isp study
  ☆17Updated 5 years ago
• sh-vlad / FPGA_rtime_HDR_video
  We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.
  ☆31Updated 6 years ago
• srohit0 / mida
  Selected problems and their solutions from the book on "Machine Intelligence in Design Automation"
  ☆27Updated 7 years ago
• BG2BKK / img_process_vhdl
  Image Processing on FPGA using VHDL
  ☆43Updated 11 years ago
• edwardclin2003 / LowPassFilterImageFPGA
  Verilog code that does 2D Low Pass Filter on a greyscale image
  ☆10Updated 10 years ago
• maltanar / qnn-inference-examples
  Jupyter notebook examples on image classification with quantized neural networks
  ☆71Updated 5 years ago
• Charmve / AccANN
  🐆 A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration for *AdderNet*
  ☆21Updated last year
• dicecco1 / fpga_cpfp
  HLS Custom-Precision Floating-Point Library
  ☆13Updated 8 years ago
• xlsjdjdk / Ship-Detection-based-on-YOLOv3-and-KV260
  This is the entry project of the Xilinx Adaptive Computing Challenge 2021. It uses YOLOv3 for ship target detection in optical remote sen…
  ☆17Updated 3 years ago
• ykqiu / image-processing
  Real-Time Image Processing for ASIC/FGPA
  ☆22Updated 3 years ago
• xupsh / Digital-Design-Reference-Design
  ☆24Updated 9 years ago
• flasonil / Deep-Neural-Network-for-CS-based-signal-reconstruction-on-STM32-MCU-board
  Compressed Sensing signal decoding with DNN oracle on STM32
  ☆16Updated 4 years ago
• DCLAB08 / Real-Time-Image-Video-Dehazing
  The Final Project of team 8, NTUEE, Digital Circuits Lab (2021 Fall)
  ☆37Updated 3 years ago
• AugustinJose1221 / Video-Stitching
  ☆32Updated 5 years ago
• SameLight / ITRI-OpenDLA
  Express DLA implementation for FPGA, revised based on NVDLA.
  ☆11Updated 6 years ago
• parimalp / Advanced-Embedded-System-Design-Flow-on-Zynq
  ☆18Updated 7 years ago
• nimish15shah / DPU_DAG_Processing_Unit
  RTL code for the DPU chip designed for irregular graphs
  ☆13Updated 3 years ago
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 7 years ago
• slongfield / StereoCensus
  Verilog Implementation of the Census Transform Stereo Vision algorithm
  ☆30Updated 2 years ago
• ChrisZonghaoLi / cnn_conv_accelerator
  A Fix-pointed Rudimentary CNN Convolution Accelerator
  ☆16Updated 5 years ago
• Xilinx / PYNQ-DL
  Xilinx Deep Learning IP
  ☆94Updated 4 years ago
• balbekov / PyH264
  Python implementation of H264
  ☆60Updated 2 months ago
• labis7 / UNET-FPGA
  Using Xilinx tools, the Unet architecture will be implemented and optimized for FPGA use. Some convolution-transposed conv sub-parts of t…
  ☆16Updated 4 years ago
• heya5 / ZYNQ_Linux_CNN
  This project implemented an unoptimized simple convolutional neural network in ZYNQ's PL and realized data transmission through axidma dr…
  ☆12Updated 7 years ago
• amiq-consulting / image-upscaling-CNN
  How to Accelerate an Image Upscaling CNN on FPGA Using HLS
  ☆25Updated 4 years ago
• max2ma / shiftNet
  ☆14Updated 6 years ago
• e-dupuis / awesome-approximate-dnn
  Curated content for DNN approximation, acceleration ... with a focus on hardware accelerator and deployment
  ☆27Updated last year
• MohammedRashad / FPGA-Speech-Recognition
  Expiremental Speech Recognition System using VHDL & MATLAB.
  ☆50Updated 7 years ago