Alternatives and similar repositories for JPEG2000_serial

Users that are interested in JPEG2000_serial are comparing it to the libraries listed below

• lulinchen / jpeg2000_open
  A simple JPEG2000 hardware encoder
  ☆21Updated 4 years ago
• WangXuan95 / FPGA-MPEG2-encoder
  An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器，可实现视频压缩。
  ☆129Updated last year
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆76Updated 2 years ago
• aiminickwong / H264
  H264视频解码verilog实现
  ☆82Updated 7 years ago
• aquaxis / aq_mipi_csi2rx_ultrascaleplus
  ☆31Updated 5 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆37Updated 4 years ago
• kailiuXD / xdcom
  This is a demo for still image compression application
  ☆13Updated 7 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆94Updated 5 years ago
• ultraembedded / core_jpeg
  High throughput JPEG decoder in Verilog for FPGA
  ☆234Updated 3 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆151Updated 4 months ago
• VideoGPU / MIPI_CSI2_TX
  VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes
  ☆70Updated 2 years ago
• WangXuan95 / FPGA-LZMA-compressor
  An FPGA-based LZMA compressor for generic data compression. 基于FPGA的LZMA压缩器，用于通用数据压缩。
  ☆85Updated last year
• nxthuan512 / FPGA-based-JPEG-codec-accelerator
  High-performance FPGA-based JPEG codec accelerator
  ☆13Updated 6 years ago
• KevinHexin / FPGA-Bicubic-interpolation
  use Verilog HDL implemente bicubic interpolation in FPGA
  ☆24Updated 5 years ago
• WangXuan95 / FPGA-Gzip-compressor
  An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …
  ☆131Updated last year
• WangXuan95 / FPGA-SATA-HBA
  A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器，用来读写硬盘。
  ☆106Updated last year
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆56Updated 5 years ago
• tishi43 / h265_decoder
  H265 decoder write in verilog, verified on Xilinx ZYNQ7035
  ☆72Updated 3 years ago
• gtjennings1 / JPEG_Encoder
  ☆15Updated 6 years ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆49Updated last year
• freecores / video_stream_scaler
  Video Stream Scaler
  ☆40Updated 11 years ago
• antmicro / nvme-verilog-pcie
  ☆69Updated 3 years ago
• aquaxis / gemac
  Gigabit MAC + UDP/TCP/IP offload Engine
  ☆31Updated 5 years ago
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆73Updated last year
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆56Updated 3 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 5 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆43Updated 2 years ago
• mhhai / ImageStitchBasedOnFPGA
  七路图像在FPGA中实现拼接，代码会不断添加进来。
  ☆25Updated 3 years ago
• MaharshSuryawala / Image-Compression
  Modified the conventional JPEG compression algorithm with Lloyd-Max Quantizer. Implemented in MATLAB and tested on Xilinx Artix-7 FPGA.
  ☆16Updated 4 years ago
• hypernyan / eth_vlg
  ☆70Updated 3 years ago