chriz2600 / quartus-liteLinks
Quartus Lite docker
☆38Updated 5 years ago
Alternatives and similar repositories for quartus-lite
Users that are interested in quartus-lite are comparing it to the libraries listed below
Sorting:
- Miscellaneous ULX3S examples (advanced)☆81Updated 6 months ago
- Intel Quartus Prime Synthesis Engine for Docker☆52Updated last year
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆82Updated 5 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆44Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆93Updated 7 years ago
- Portable HyperRAM controller☆62Updated last year
- New clean hdmi implementation for ulx3s, icestick, icoboard, arty7, colorlight i5 and blackicemx! With tmds encoding hacked down from dvi…☆104Updated 4 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Updated 3 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 7 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆66Updated 2 years ago
- Example Verilog code for Ulx3s☆41Updated 3 years ago
- A FPGA core for a simple SDRAM controller.☆122Updated 4 years ago
- Cyclone V bitstream reverse-engineering project☆129Updated 2 years ago
- A complete HDMI transmitter implementation in VHDL☆21Updated 6 months ago
- A compact USB HID host FPGA core supporting keyboards, mice and gamepads.☆151Updated 9 months ago
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆58Updated 2 years ago
- Re-coded Gowin GW1N primitives for Verilator use☆20Updated 3 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆35Updated last month
- Reusable Verilog 2005 components for FPGA designs☆49Updated 3 weeks ago
- A simple GPU on a TinyFPGA BX☆81Updated 7 years ago
- Homebrew formulae for building FPGA bitstreams with open-source tools.☆58Updated 3 years ago
- HDMI core in Chisel HDL☆52Updated last year
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆34Updated 9 years ago
- Use ECP5 JTAG port to interact with user design☆33Updated 4 years ago
- FPGA Odysseus with ULX3S☆69Updated 2 years ago
- DVI video out example for prjtrellis☆17Updated 6 years ago
- Test for video output using the ADV7513 chip on a de10 nano board☆55Updated 6 years ago
- FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.☆57Updated 2 years ago
- Source code to accompany https://timetoexplore.net☆63Updated 5 years ago