igorauad / bchLinks
Bose–Chaudhuri–Hocquenghem Codes in Python
☆13Updated 2 years ago
Alternatives and similar repositories for bch
Users that are interested in bch are comparing it to the libraries listed below
Sorting:
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆36Updated last year
- Cryptanalysis of Physically Unclonable Functions☆91Updated last year
- Hardware implementation of ORAM☆24Updated 8 years ago
- Circuit Synthesis for Yao's Garbled Circuit by TinyGarble☆11Updated 5 years ago
- Hardware designs for fault detection☆18Updated 5 years ago
- Hardware Security Labs☆30Updated 8 years ago
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆23Updated last year
- FPGA implementation of a physical unclonable function for authentication☆33Updated 8 years ago
- Hardware Design of Ascon☆29Updated 2 months ago
- Simple deep learning side channel attack. Experimental data set based on chipwhisperer.☆29Updated 4 years ago
- VerMFi: Verification tool for Masked implementations and Fault injection. Set of tools to evaluate resistance of secure hardware against …☆20Updated 6 years ago
- An Implementation of the Number Theoretic Transform☆51Updated 2 years ago
- Verilog RTL Implementation of DNN☆10Updated 7 years ago
- Defense/Attack PUF Library (DA PUF Library)☆54Updated 5 years ago
- A Built-in-Self-Test Scheme for Online Evaluation of Physical Unclonable Functions and True Random Number Generators☆24Updated 8 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆11Updated 6 years ago
- The ML_Attack_XOR_PUF is a Machine Learning-based model for attacking the XOR Physical Unclonable Functions using a small number of chall…☆20Updated 5 years ago
- Repository to store all design and testbench files for Senior Design☆22Updated 5 years ago
- Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)☆63Updated 5 years ago
- FPGA related files for ORAM☆14Updated 10 years ago
- A list of VHDL codes implementing cryptographic algorithms☆27Updated 4 years ago
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆12Updated 5 years ago
- ☆21Updated last year
- RISC-V instruction set extensions for SM4 block cipher☆20Updated 5 years ago
- TEE hardware - based on the chipyard repository - hardware to accelerate TEE☆24Updated 3 years ago
- Intel Homomorphic Encryption Acceleration Library for FPGAs, including open source implementation of FPGA kernels for accelerating NTT, I…☆107Updated 3 years ago
- Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)☆16Updated 4 years ago
- ☆25Updated 4 years ago
- Chisel NVMe controller☆25Updated 3 years ago
- Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现,基为2,有两个并行的蝶形单元☆19Updated 3 years ago