Verilog implementation of Pac-Man made for a class's final project
☆19Mar 7, 2012Updated 14 years ago
Alternatives and similar repositories for Verilog-Pac-Man
Users that are interested in Verilog-Pac-Man are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- C++ Double Pendulum☆11Apr 21, 2021Updated 5 years ago
- Projects and Labs for the Parallel Programming for FPGAs book☆23Dec 3, 2025Updated 7 months ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- CNN and RNN based architectures for Motor Imagery Classification☆15Jun 13, 2019Updated 7 years ago
- Scripts for Digital Design flow control.☆17Oct 30, 2025Updated 8 months ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆14Sep 22, 2025Updated 10 months ago
- Using an Altera DE10-Lite FPGA development board to simulate an FFT processor. Audio input frequencies will be visualized onto a VGA disp…☆17May 5, 2020Updated 6 years ago
- Small footprint and configurable HyperBus core☆14Jul 6, 2022Updated 4 years ago
- ☆21Sep 13, 2023Updated 2 years ago
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- Video player that can open a video file via a Qt GUI interface, and stream it via USB VCP to a microcontroller which then displays it on …☆16Jul 26, 2020Updated 5 years ago
- Verilog Design, Simulation & Synthesis of Digital ASIC Projects☆20Jan 27, 2023Updated 3 years ago
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- Fugle Realtime API client library for Node.js☆11Dec 16, 2022Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- SPI core☆14Oct 25, 2019Updated 6 years ago
- Freecellera fork of the Universal Verification Methodology (SystemVerilog verification library from Accellera.org)☆11Apr 9, 2015Updated 11 years ago
- Understand how TCL scripting automates ASIC synthesis and timing analysis using Yosys & OpenTimer, with CSV/Excel inputs acting as fr…☆19Oct 26, 2025Updated 8 months ago
- FPGA implementation of a simple scanline based 2d graphics engine☆24Feb 26, 2019Updated 7 years ago
- PipeProof☆11Dec 18, 2019Updated 6 years ago
- SHA256 hardware accelerator, synthesized for and mapped on the Zynq core of the Zybo board by Digilent☆27Jul 10, 2018Updated 8 years ago
- A small, zero-dependency Redis client for Clojure.☆29Sep 11, 2025Updated 10 months ago
- An LLVM backend for my custom 32-bit RISC CPU https://scholarworks.rit.edu/theses/9550/☆14Aug 16, 2017Updated 8 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆21Jul 4, 2026Updated 2 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- C++ and Verilog to implement AES128☆24Apr 30, 2018Updated 8 years ago
- This project aims at implementing an hardware accelerator peripheral for SHA256 hashing algorithm with AXI4 interfacing with PicoRV32 CPU…☆32Dec 12, 2021Updated 4 years ago
- SystemVerilog Logger☆19Apr 6, 2026Updated 3 months ago
- Functional-Level Virtualization in 5G Core Network☆13Jun 9, 2018Updated 8 years ago
- # 3.Interview_Questions In my experience, the questions i faced in the interviews and the people surrounded me must have faced a couple o…☆26Jul 9, 2025Updated last year
- A C++ Library for Hardware Design and Simulation☆15May 17, 2020Updated 6 years ago
- Student project for using audio on the DE2-115 FPGA development board.☆28Apr 28, 2018Updated 8 years ago
- Syntacore first stage bootloader☆11Jan 19, 2026Updated 6 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Contains source code for sin/cos table verification using UVM☆23Mar 9, 2021Updated 5 years ago
- "Talking PD" article code repository☆14Jun 23, 2023Updated 3 years ago
- Homework 1 for Introduction to Operating Systems, Fall 2015☆10Oct 26, 2015Updated 10 years ago
- C++ to OpenCL C Source-to-source Translation☆13Feb 15, 2014Updated 12 years ago
- Block-diagram style digital logic visualizer☆23Sep 16, 2015Updated 10 years ago
- MicroPython - a lean and efficient Python implementation for microcontrollers and constrained systems☆16Jun 20, 2024Updated 2 years ago
- verilator testbench w/ Javascript using N-API☆19Feb 19, 2026Updated 5 months ago