Alternatives and similar repositories for HM-CORE

Users that are interested in HM-CORE are comparing it to the libraries listed below

• maxs-well / ad7606-driver-verilog
  AD7606 driver verilog
  ☆43Updated 6 years ago
• pbing / FM_Radio
  Simple mono FM Radio.
  ☆48Updated 9 years ago
• DeamonYang / FPGA_SDR
  软件无线电，使用FPGA进行正交解调。
  ☆22Updated 6 years ago
• balmerdx / sdio_linux_fpga
  Communication channel from FPGA (Alterra EP4CE10) and Linux (Lichee PI Allwinner V3S)
  ☆29Updated 5 years ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆72Updated 3 years ago
• For-up / SEA-S7Guess
  SEA-S7_gesture recognition
  ☆16Updated 5 years ago
• dukelec / cdpga
  FPGA core boards / evaluation boards based on CDCTL hardware
  ☆93Updated 3 years ago
• Hamid-R-Tanhaei / ZYNQ_ADC_DMA_LWIP
  Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
  ☆49Updated 4 years ago
• agural / FPGA-Oscilloscope
  Design, Documentation, Schematic, Board, Code files for the FPGA Oscilloscope project using an Altera Cyclone III FPGA.
  ☆110Updated 11 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆53Updated 2 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆45Updated 3 months ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 4 years ago
• tom66 / scopy-fpga
  Application software for Scopy MVP: FPGA PS, PL, and microcontroller firmware
  ☆73Updated 4 years ago
• takeshineshiro / fpga_fibre_scan
  本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互，CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程： 1. 链路初始化： 在上位机完成USB固件的下载，并读取…
  ☆28Updated 9 years ago
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆30Updated 6 years ago
• circuitvalley / USB3_MIPI_CSI2_RX_V2_Crosslink_NX
  MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…
  ☆58Updated 5 months ago
• m-labs / tdc-core
  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
  ☆62Updated 10 years ago
• jobisoft / jTDC
  FPGA based 30ps RMS TDCs
  ☆86Updated 7 years ago
• xycfwrj / zynq_axi_ddr_barebone
  minimal code to access ps DDR from PL
  ☆20Updated 5 years ago
• suisuisi / jtag
  fpga jtag hardware
  ☆21Updated 2 years ago
• DeamonYang / FPGA_USB2.0_DAQ
  基于USB2.0 的数据采集卡
  ☆19Updated 6 years ago
• cudnn / USBtoMIPI
  - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA
  ☆11Updated 8 years ago
• ptracton / UART_ECHO
  Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.
  ☆13Updated 10 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆68Updated 7 years ago
• freecores / turbo8051
  turbo 8051
  ☆29Updated 7 years ago
• ATaylorCEngFIET / SP701_Imaging_Vivado
  Vivado project for the SP701 Imaging application project
  ☆13Updated 5 years ago
• roy77 / Cameralink-LPC-FMC-Module
  ☆20Updated 10 years ago
• Hello-FPGA / BISS-C
  This is BISS-C FPGA IP and It's Driver Repo
  ☆30Updated last year
• tom66 / scopeapp
  ☆28Updated 4 years ago
• yedk / arm_cortex_m0_xillinx
  基于arm cortex-m0内核的xillinx fpga sopc工程项目
  ☆13Updated 6 years ago