HMLAB / HM-CORE
Open source zynq platform
☆18Updated 6 years ago
Alternatives and similar repositories for HM-CORE:
Users that are interested in HM-CORE are comparing it to the libraries listed below
- Simple mono FM Radio.☆47Updated 8 years ago
- fpga jtag hardware☆21Updated 2 years ago
- SEA-S7_gesture recognition☆15Updated 4 years ago
- Communication channel from FPGA (Alterra EP4CE10) and Linux (Lichee PI Allwinner V3S)☆29Updated 5 years ago
- 基于Kintex-7 XC7K325T的高性能FPGA功能验证板☆19Updated 5 years ago
- ☆26Updated 4 years ago
- 软件无线电,使用FPGA进行正交解调。☆20Updated 6 years ago
- 本信号处理板主要由FPGA芯片和CYUSB3.0 芯片组成,其中FPGA模块主要完成与相关外设的交互,CYUSB3.0主要完成协议数据的传输。 2.2.1 FPGA模块 处理流程: 1. 链路初始化: 在上位机完成USB固件的下载,并读取…☆25Updated 9 years ago
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆55Updated 2 months ago
- FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface☆17Updated 2 years ago
- Eagle design files of a two layer PCB for the ALTERA EP3C5E144 FPGA, including a FTDI USB2.0 controller, 2x 80 MSPS ADC, GPIO, JTAG, conf…☆12Updated 10 years ago
- 基于USB2.0 的数据采集卡☆17Updated 6 years ago
- ☆18Updated 9 years ago
- JESD204b modules in VHDL☆29Updated 6 years ago
- minimal code to access ps DDR from PL☆19Updated 5 years ago
- 4-Layer XC7Z010 DDR3 Layout☆16Updated 3 years ago
- This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals☆23Updated last year
- ☆14Updated 3 years ago
- 基于arm cortex-m0内核的xillinx fpga sopc工程项目☆12Updated 5 years ago
- an sata controller using smallest resource.☆15Updated 11 years ago
- ZYNQ-IPMC Hardware☆17Updated 2 years ago
- ☆19Updated 4 years ago
- Xilinx Virtual Cable server written in python connecting Xilinx with different JTAG adapters☆11Updated 11 years ago
- FPGA core boards / evaluation boards based on CDCTL hardware☆92Updated 3 years ago
- Vivado project for the SP701 Imaging application project☆13Updated 5 years ago
- Xilinx virtual cable daemon j-link support☆20Updated 8 years ago
- Testbenches for HDL projects☆15Updated last week
- Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.☆13Updated 9 years ago
- USB serial device (CDC-ACM)☆38Updated 4 years ago
- development interface mil-std-1553b for system on chip☆21Updated 7 years ago