ikwzm / ZynqMP-FPGA-Ubuntu18.04-Ultra96

Related projects ⓘ

Alternatives and complementary repositories for ZynqMP-FPGA-Ubuntu18.04-Ultra96

• fixstars / ultra96_design
  Repository of HW design and SW for Ultra96 board + MIPI board
  ☆17Updated 5 years ago
• lp6m / ImageDetectionHW2
  HOG + SVM on FPGA
  ☆25Updated 3 years ago
• ikwzm / ZynqMP-FPGA-Linux
  FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)
  ☆128Updated last year
• hellgate202 / csi2_rx
  MIPI CSI-2 RX
  ☆29Updated 3 years ago
• Digilent / Petalinux-Zybo-Z7-20
  ☆52Updated 2 years ago
• Xilinx / Xilinx_Kria_KV260_Workshop
  ☆40Updated 3 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• andreamerello / zynqmp-zcu102
  zynqmp-zcu102 hacks
  ☆19Updated 7 years ago
• Digilent / Zybo-Z7-20-pcam-5c
  ☆53Updated 2 years ago
• h-nasiri / Zynq-Linux-DMA
  DMA enabled Zynq PS-PL communication to implement high throughput data transfer between Linux applications and user IP core.
  ☆37Updated 7 years ago
• Avnet / petalinux
  Repository used to support automated builds under PetaLinux tools that use Yocto.
  ☆59Updated last month
• cathalmccabe / pynq-z1_board_files
  PYNQ-Z1 board files for Vivado
  ☆32Updated 2 years ago
• aignacio / axi_dma
  General Purpose AXI Direct Memory Access
  ☆44Updated 6 months ago
• RSPwFPGAs / opae-xilinx
  OPAE porting to Xilinx FPGA devices.
  ☆38Updated 4 years ago
• Avnet / Ultra96-PYNQ
  Board files to build Ultra 96 PYNQ image
  ☆152Updated 2 months ago
• gewuek / vitis_ai_custom_platform_flow
  This project is trying to create a base vitis platform to run with DPU
  ☆47Updated 4 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆63Updated this week
• AEW2015 / PYNQ_PR_Overlay
  Adding PR to the PYNQ Overlay
  ☆17Updated 7 years ago
• sfox14 / pynq-ekf
  A multi-board Extended Kalman Filter (EKF)
  ☆28Updated 6 years ago
• tchoyt / pynq_dev
  Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development
  ☆12Updated 6 years ago
• Avnet / bdf
  Avnet Board Definition Files
  ☆125Updated this week
• fixstars / xg_mac
  10G Ethernet MAC implementation
  ☆21Updated 4 years ago
• Digilent / digilent-vivado-scripts
  ☆63Updated 4 months ago
• varunnagpaal / Digital-Hardware-Modelling
  Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)
  ☆59Updated 3 years ago
• Xilinx / SDSoC_Examples
  ☆82Updated 4 years ago
• pulp-platform / ne16
  Neural Engine, 16 input channels
  ☆13Updated 2 years ago
• Xilinx / pcie-model
  PCI Express controller model
  ☆45Updated 2 years ago
• Xilinx / PYNQ-BOT
  ☆26Updated 6 years ago
• wady101 / Embedded-System-Design-Flow-on-Zynq
  Updated version of the XUP Workshops
  ☆17Updated 6 years ago