Projects published on controlpaths.com and hackster.io
☆42Jul 18, 2022Updated 3 years ago
Alternatives and similar repositories for blog
Users that are interested in blog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- VHDL Library for implementing common DSP functionality.☆33Oct 5, 2018Updated 7 years ago
- Template Verilator project for beginners☆13Feb 2, 2023Updated 3 years ago
- An attempt to reverse engineer a bitstream made for an AL3-10 FPGA☆16Jan 6, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- An example project which uses many of the ideas and features of the hVHDL libraries like fixed and floating point math modules and has bu…☆30Jan 13, 2025Updated last year
- Designs of first-order SCA-secure hardware implementations of AES encryption/decryptoin dedicated to Xilinx FPGAs (using BRAM)☆17Dec 24, 2020Updated 5 years ago
- ☆19Oct 5, 2020Updated 5 years ago
- Design and implementation of a reconfigurable FIR filter in FPGA☆15Sep 26, 2022Updated 3 years ago
- Userspace DMA library for Zynq-based SoCs☆16Jan 22, 2019Updated 7 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆28Jul 11, 2024Updated last year
- Flip flop setup, hold & metastability explorer tool☆52Oct 28, 2022Updated 3 years ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39May 24, 2026Updated 2 weeks ago
- Verilog re-implementation of the famous CAPCOM arcade game☆29Jan 25, 2019Updated 7 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- VHDL PCIe Transceiver☆34Jul 2, 2020Updated 5 years ago
- OSVVM project simulation scripts. Scripts are tedious. These scripts simplify the steps to compile your project for simulation☆14Updated this week
- File editor for the Xilinx AXI Traffic Generator IP☆17Feb 9, 2026Updated 4 months ago
- Vivado project for Xilinx Artix FPGA, used in logic analyzer☆14Jul 16, 2021Updated 4 years ago
- An FPGA-based NetTLP adapter☆29Mar 10, 2020Updated 6 years ago
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 3 months ago
- example code for the logi-boards from pong chu HDL book☆30Sep 4, 2015Updated 10 years ago
- A simple script to build open-source FPGA tools.☆54Oct 25, 2022Updated 3 years ago
- DSP by FPGA☆15Sep 12, 2023Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- An FPGA implementation of a digital storage oscilloscope.☆28Apr 20, 2017Updated 9 years ago
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 9 years ago
- Simple design for 16x2 OLED Character Display using the US2066 chip☆13Apr 20, 2023Updated 3 years ago
- Library for reading Xilinx .bit bitstream file headers with metadata extraction☆14Apr 7, 2026Updated 2 months ago
- Render waveforms inside VSCode with WaveDrom☆40May 25, 2026Updated 2 weeks ago
- A basic documentation generator for Verilog, similar to Doxygen.☆13Aug 5, 2016Updated 9 years ago
- This repository is a collection of designs invloving FPGAs and AI technologies.☆14Jan 11, 2023Updated 3 years ago
- Program to scan for malicious FPGA designs.☆17Mar 20, 2021Updated 5 years ago
- Arduino library to support the VL53L0X Time-of-Flight and gesture-detection sensor☆20Nov 15, 2021Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- SSD test project using Zynq Ultrascale+ bare metal NVMe.☆23Oct 8, 2021Updated 4 years ago
- ☆12Sep 19, 2018Updated 7 years ago
- Simulate electronic circuit using Python and the Ngspice / Xyce simulators☆157Feb 12, 2023Updated 3 years ago
- A repository of information and source files for toolflow-supported hardware☆36Jul 15, 2022Updated 3 years ago
- Docker image with Xilinx ISE 14.7☆36Feb 1, 2021Updated 5 years ago
- verilog core for ws2812 leds☆35Nov 3, 2021Updated 4 years ago