Wren6991 / asciiwave
Turn WaveDrom timing diagrams into ASCII art
☆154Updated last year
Alternatives and similar repositories for asciiwave:
Users that are interested in asciiwave are comparing it to the libraries listed below
- USB Serial on the TinyFPGA BX☆136Updated 3 years ago
- Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)☆249Updated last year
- Multi-platform nightly builds of open source FPGA tools☆295Updated 3 years ago
- CLI for WaveDrom☆61Updated last year
- Example LED blinking project for your FPGA dev board of choice☆173Updated last month
- ☆77Updated last year
- A wishbone controlled scope for FPGA's☆77Updated last year
- VCD file (Value Change Dump) command line viewer☆116Updated 2 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆166Updated last year
- HDL symbol generator☆190Updated 2 years ago
- This repository contains small example designs that can be used with the open source icestorm flow.☆147Updated 3 years ago
- USB3 PIPE interface for Xilinx 7-Series☆209Updated 2 years ago
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆72Updated this week
- Basic ECP5 based GigE to SYZYGY interface.☆200Updated last year
- Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation☆260Updated last year
- Documenting Lattice's 28nm FPGA parts☆142Updated last year
- assorted library of utility cores for amaranth HDL☆87Updated 6 months ago
- Small footprint and configurable embedded FPGA logic analyzer☆173Updated last month
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆159Updated this week
- Logicbone ECP5 Development Board☆115Updated 4 years ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆85Updated 6 years ago
- A FPGA core for a simple SDRAM controller.☆118Updated 3 years ago
- Streaming based VHDL parser.☆81Updated 8 months ago
- ☆107Updated 2 years ago
- Style guide enforcement for VHDL☆204Updated this week
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆136Updated 3 years ago
- Control and Status Register map generator for HDL projects☆114Updated last month
- Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs☆105Updated 3 years ago
- IceChips is a library of all common discrete logic devices in Verilog☆140Updated 4 months ago
- List of all links you can try with ULX3S☆98Updated 3 years ago