TinyTapeout / tt07-verilog-templateLinks
Submission template for Tiny Tapeout 7 - Verilog HDL Projects
☆19Updated last year
Alternatives and similar repositories for tt07-verilog-template
Users that are interested in tt07-verilog-template are comparing it to the libraries listed below
Sorting:
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆106Updated 3 weeks ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆109Updated last year
- Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…☆71Updated 3 weeks ago
- tools used by project repos to test configuration, generate OpenLane run summaries and documentation☆25Updated last week
- A pipelined RISC-V processor☆58Updated last year
- Demo projects for various Kintex FPGA boards☆62Updated 4 months ago
- Raptor end-to-end FPGA Compiler and GUI☆84Updated 9 months ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆50Updated last year
- Many peripherals in Verilog ready to use☆39Updated 8 months ago
- Greyhound on IHP SG13G2 0.13 μm BiCMOS process☆56Updated 2 weeks ago
- Example of how to get started with olofk/fusesoc.☆17Updated 4 years ago
- Submission template for Tiny Tapeout 10 - Verilog HDL Projects☆25Updated 3 months ago
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆83Updated last week
- FPGA based microcomputer sandbox for software and RTL experimentation☆66Updated 2 weeks ago
- SAR ADC on tiny tapeout☆42Updated 7 months ago
- Virtual Development Board☆61Updated 3 years ago
- ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.☆95Updated this week
- Submission template for Tiny Tapeout 6 - Verilog HDL Projects☆34Updated last year
- Example LED blinking project for your FPGA dev board of choice☆184Updated 2 weeks ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆62Updated 3 years ago
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs☆180Updated last year
- Open source designs developed with IHP 130nm BiCMOS Open Source PDK. Documentation at https://ihp-open-ip.readthedocs.io/en/latest/☆59Updated last month
- Convenience script to install the nextpnr-xilinx toolchain for Kintex7, Artix7, Spartan7 and Zynq7☆89Updated 3 months ago
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆31Updated 2 years ago
- Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process☆18Updated 5 months ago
- Small SERV-based SoC primarily for OpenMPW tapeout☆47Updated 3 months ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆54Updated this week
- ☆70Updated last year
- Wishbone interconnect utilities☆41Updated 7 months ago
- ☆36Updated 10 months ago