Alternatives and similar repositories for tt07-verilog-template

Users that are interested in tt07-verilog-template are comparing it to the libraries listed below

• meiniKi / FazyRV
  A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
  ☆109Updated 3 weeks ago
• chili-chips-ba / openCologne
  Spicing up the first and (no longer) the only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples =>…
  ☆85Updated 2 months ago
• stnolting / neorv32-setups
  📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.
  ☆86Updated this week
• stnolting / neorv32-riscof
  ✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.
  ☆38Updated last week
• TinyTapeout / tt06-verilog-template
  Submission template for Tiny Tapeout 6 - Verilog HDL Projects
  ☆35Updated last year
• stnolting / neorv32-verilog
  ♻️ Convert the NEORV32 processor into a synthesizable plain-Verilog netlist module using GHDL.
  ☆101Updated last month
• olofk / subservient
  Small SERV-based SoC primarily for OpenMPW tapeout
  ☆47Updated 3 weeks ago
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆93Updated last year
• BrunoLevy / TordBoyau
  A pipelined RISC-V processor
  ☆63Updated 2 years ago
• mattvenn / flipflop_demo
  Flip flop setup, hold & metastability explorer tool
  ☆51Updated 3 years ago
• mole99 / greyhound-ihp
  Greyhound on IHP SG13G2 0.13 μm BiCMOS process
  ☆77Updated 3 weeks ago
• TinyTapeout / tinytapeout-ihp-0p1
  Experimental Tiny Tapeout chip on IHP SG13G2 0.13 μm BiCMOS process
  ☆19Updated 9 months ago
• antonblanchard / vlsiffra
  Create fast and efficient standard cell based adders, multipliers and multiply-adders.
  ☆120Updated 2 years ago
• olofk / vidbo
  Virtual Development Board
  ☆64Updated 4 years ago
• wulffern / tt06-sar
  SAR ADC on tiny tapeout
  ☆44Updated 11 months ago
• TinyTapeout / tt03-submission-template
  Submission template for Tiny Tapeout 03
  ☆22Updated 2 years ago
• TinyTapeout / tt-micropython-firmware
  TinyTapeout demo pcb's RP2040 functionality
  ☆17Updated 3 weeks ago
• FelipeFFerreira / ITA-CORES
  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
  ☆55Updated 2 years ago
• ulixxe / usb_cdc
  Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs
  ☆186Updated last year
• epsilon537 / boxlambda
  FPGA based microcomputer sandbox for software and RTL experimentation
  ☆75Updated 2 weeks ago
• leonow32 / verilog-fpga
  Many peripherals in Verilog ready to use
  ☆41Updated last year
• najaeda / naja
  Structural Netlist API (and more) for EDA post synthesis flow development
  ☆129Updated this week
• openhwgroup / cva5
  The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.
  ☆124Updated 6 months ago
• dineshannayya / riscduino
  Arduino compatible Risc-V Based SOC
  ☆159Updated last year
• zephray / RISu064
  Dual-issue RV64IM processor for fun & learning
  ☆64Updated 2 years ago
• YosysHQ / nerv
  Naive Educational RISC V processor
  ☆94Updated 2 months ago
• efabless / caravel_board
  ☆38Updated last year
• FPGA-Research / FABulator
  Fabric generator and CAD tools graphical frontend
  ☆17Updated 5 months ago
• aesc-silicon / i2c-gpio-expander
  End-to-End Open-Source I2C GPIO Expander
  ☆33Updated 3 weeks ago
• aignacio / nox
  RISC-V Nox core
  ☆71Updated 5 months ago