Lingrui98 / RISC-V-book

Related projects ⓘ

Alternatives and complementary repositories for RISC-V-book

• plctlab / writing-your-first-riscv-simulator
  《从零开始的RISC-V模拟器开发》配套的PPT和教学资料
  ☆194Updated 3 years ago
• LvNA-system / labeled-RISC-V
  ☆164Updated 3 years ago
• OpenXiangShan / NEMU
  ☆236Updated this week
• cnrv / riscv-soc-book
  关于RISC-V你所需要知道的一切
  ☆542Updated last year
• LiHao217 / RISC-V_article_paper_src
  riscv资料、论文等
  ☆140Updated 6 years ago
• OSCPU / NutShell-doc
  ☆116Updated 2 years ago
• OpenXiangShan / XiangShan-doc
  Documentation for XiangShan
  ☆351Updated last week
• riscv-non-isa / riscv-sbi-doc
  Documentation for the RISC-V Supervisor Binary Interface
  ☆352Updated last week
• sycuricon / starship
  Run rocket-chip on FPGA
  ☆61Updated last week
• cnrv / home
  为推广RISC-V尽些薄力
  ☆306Updated last year
• OpenXiangShan / difftest
  Modern co-simulation framework for RISC-V CPUs
  ☆117Updated this week
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆162Updated 3 years ago
• hehao98 / RISCV-Simulator
  A Simple RISC-V CPU Simulator with 5 Stage Pipeline, Branch Prediction and Cache Simulation
  ☆162Updated 7 months ago
• arch-simulator-sig / advanced-computer-architecture
  体系结构研讨 + ysyx高阶大纲 (WIP
  ☆115Updated last month
• runninglinuxkernel / riscv_programming_practice
  ☆178Updated last year
• mollybuild / RISCV-Measurement
  This is a repo for recording and reporting RISCV platform's test and measurement continuously.
  ☆52Updated 11 months ago
• trivialmips / TrivialMIPS
  MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support
  ☆104Updated 5 years ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆133Updated last year
• z4yx / NaiveMIPS-HDL
  Naïve MIPS32 SoC implementation
  ☆113Updated 4 years ago
• riscv-non-isa / riscv-elf-psabi-doc
  A RISC-V ELF psABI Document
  ☆711Updated last month
• ysyx-org / jemu-decoder
  The decoder library for jemu execution and web documentation
  ☆55Updated last year
• cnrv / fpga-rocket-chip
  Wrapper for Rocket-Chip on FPGAs
  ☆125Updated 2 years ago
• LoveLonelyTime / Bergamot
  An exquisite superscalar RV32GC processor.
  ☆143Updated 6 months ago
• plctlab / plct-qemu
  PLCT实验室维护的QEMU仓库。代码放在 plct- 前缀的分支里。
  ☆26Updated 3 months ago
• ucb-bar / riscv-mini
  Simple RISC-V 3-stage Pipeline in Chisel
  ☆544Updated 3 months ago
• NJU-ProjectN / nvboard
  NJU Virtual Board
  ☆235Updated 3 months ago
• schoeberl / chisel-lab
  Lab exercises for Chisel in the digital electronics 2 course at DTU
  ☆175Updated 2 weeks ago
• poweihuang17 / Documentation_Spike
  Documentation for RISC-V Spike
  ☆96Updated 6 years ago
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆145Updated this week
• riscv-software-src / riscv-pk
  RISC-V Proxy Kernel
  ☆594Updated last month