LeiWang1999 / Pynq-AcceleratorLinks
A easy general acc.
☆16Updated 4 years ago
Alternatives and similar repositories for Pynq-Accelerator
Users that are interested in Pynq-Accelerator are comparing it to the libraries listed below
Sorting:
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆94Updated 10 months ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- ☆36Updated 4 years ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆81Updated last year
- A Spatial Accelerator Generation Framework for Tensor Algebra.☆58Updated 3 years ago
- ☆72Updated 2 years ago
- ☆36Updated 4 months ago
- ☆33Updated 4 months ago
- ACM TODAES Best Paper Award, 2022☆25Updated last year
- agile hardware-software co-design☆50Updated 3 years ago
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆18Updated 8 months ago
- C++ RTL simulator for EIE(https://arxiv.org/abs/1602.01528)☆23Updated 4 years ago
- ☆71Updated 5 years ago
- Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017☆30Updated 6 years ago
- Systolic array implementations for Cholesky, LU, and QR decomposition☆45Updated 8 months ago
- A DSL for Systolic Arrays☆80Updated 6 years ago
- ☆29Updated 6 years ago
- An HLS based winograd systolic CNN accelerator☆53Updated 4 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆53Updated 5 years ago
- Artifact evaluation of PLDI'24 paper "Allo: A Programming Model for Composable Accelerator Design"☆28Updated last year
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆34Updated 3 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆38Updated 2 years ago
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆40Updated 4 years ago
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆46Updated 3 years ago
- Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"☆14Updated 3 years ago
- ☆46Updated 5 years ago
- SimplePIM is the first high-level programming framework for real-world processing-in-memory (PIM) architectures. Described in the PACT 20…☆27Updated last year
- FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks☆46Updated 5 months ago
- 集成电路设计大赛ARM杯作品,获得2021年ARM企业杯☆16Updated 3 years ago
- cycle accurate Network-on-Chip Simulator☆28Updated 2 years ago