Alternatives and similar repositories for SchoolTextbooks

Users that are interested in SchoolTextbooks are comparing it to the libraries listed below

• arm-university / Introduction-to-SoC-Design-Education-Kit
  Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…
  ☆129Updated last week
• arm-university / VLSI-Fundamentals-Education-Kit
  Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …
  ☆249Updated last week
• mikinty / Hardware-Engineer-Interview-Questions
  For aspiring hardware engineers out there.
  ☆68Updated 2 months ago
• m3y54m / FPGA-ASIC-Roadmap
  A roadmap for those who want to build a career as an FPGA / ASIC Engineer
  ☆337Updated 6 months ago
• efabless / chipcraft---mest-course
  ☆33Updated 4 months ago
• PacktPublishing / The-FPGA-Programming-Handbook-Second-Edition
  Code Repository for The FPGA Programming Handbook Second Edition, Published by Packt
  ☆90Updated last month
• ash-olakangal / RISC-V-Processor
  Verilog implementation of multi-stage 32-bit RISC-V processor
  ☆106Updated 4 years ago
• amradel2020 / vlsi_linkedin_index
  This repo provide an index of VLSI content creators and their materials
  ☆150Updated 9 months ago
• arm-university / Advanced-System-on-Chip-Design-Education-Kit
  Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description an…
  ☆105Updated last week
• bmurmann / EE628
  EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
  ☆156Updated this week
• abdelazeem201 / ASIC-Design-Roadmap
  The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a c…
  ☆341Updated 3 weeks ago
• kartiksamtani / 100DaysOfRTL
  This is a passion project where I aim to explore the RTL design topics of my interest.
  ☆14Updated 2 weeks ago
• D-curs-D / Inverter-design-and-analysis-using-sky130pdk
  Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools
  ☆110Updated 3 years ago
• AngeloJacobo / FPGA_Book_Experiments
  My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu
  ☆132Updated 3 years ago
• efabless / foss-asic-tools
  FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…
  ☆83Updated 9 months ago
• digital-design-hq / Digital-Resources
  ☆59Updated 3 years ago
• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆33Updated last year
• merldsu / RISCV_Single_Cycle_Core
  This repository contains the design files of RISC-V Single Cycle Core
  ☆47Updated last year
• iic-jku / analog-circuit-design
  Course material for a basic hands-on analog circuit design course with IC emphasis
  ☆117Updated last month
• nandland / getting-started-with-fpgas
  Verilog and VHDL for book
  ☆82Updated last year
• mikeroyal / Verilog-SystemVerilog-Guide
  Verilog/SystemVerilog Guide
  ☆66Updated last year
• Nirvan007 / Analog_Electronics
  This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…
  ☆23Updated last year
• maazm007 / vsdsquadron-mini-internship
  VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.
  ☆27Updated last year
• aseddin / ece_3300
  ECE 3300 HDL Code
  ☆45Updated 2 years ago
• snbk001 / Verilog-Design-Examples
  Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…
  ☆123Updated last year
• ARC-Lab-UF / sv-tutorial
  SystemVerilog Tutorial
  ☆149Updated 3 weeks ago
• iammituraj / pequeno_riscv
  Pequeno (PQR5) is a 5-stage pipelined in-order RISC-V CPU Core compliant with RV32I ISA.
  ☆97Updated 2 weeks ago
• AngeloJacobo / RISC-V
  Design implementation of the RV32I Core in Verilog HDL with Zicsr extension
  ☆91Updated last year
• Kobzon86 / Convolutional-Neural-Network-using-SystemVerilog
  Synthesizable RTL-Based video stream Convolutional Neural Network ( non HLS )
  ☆59Updated 6 months ago
• shivanishah269 / risc-v-core
  This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…
  ☆77Updated last year