Alternatives and similar repositories for Fake-Currency-Detector

Users that are interested in Fake-Currency-Detector are comparing it to the libraries listed below

• Marco-Winzker / NN_Pattern_FPGA
  Neural Network for Pattern Recognition on an FPGA. Project for Education. Video lectures explain training of the network and FPGA impleme…
  ☆23Updated last year
• yaseensalah / Digital-Design-of-FIR-Filter
  Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…
  ☆29Updated 2 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆50Updated 6 years ago
• kmkalpana2001 / DIGITAL-VLSI-SOC-DESIGN-AND-PLANNING
  ☆45Updated last year
• mesarcik / DRFM
  Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"
  ☆30Updated 4 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆32Updated 4 years ago
• AbdullahAnsarii / BandPassFilter
  FIR band-pass filter using Verilog HDL.
  ☆12Updated 5 years ago
• jchengX / MAC_BFM
  wifi
  ☆12Updated 8 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆48Updated 9 years ago
• abhishekgb / Kalman-Filter-verilog
  Hey guys this the project where i have implemented the Kalman filter for MPPT for solar PV module
  ☆19Updated 8 years ago
• sarthak268 / Embedded_Logic_and_Design
  This repository contains all labs done as a part of the Embedded Logic and Design course.
  ☆26Updated 7 years ago
• vinayrayapati / iiitb_rv32i
  ☆14Updated 3 years ago
• maazm007 / 100Daysof_RTL
  The Repository contains the code of various Digital Circuits
  ☆11Updated 2 years ago
• Heng-xiu / implement-CRC-32-in-Verilog
  Project in Course named DESIGN AND IMPLEMENTATION OF COMMUNICATION PROTOCOLS in FCU
  ☆14Updated 11 years ago
• AngeloJacobo / FPGA_OV7670_Camera_Interface
  Real-time streaming of OV7670 camera via VGA with a 640x480 resolution at 30fps
  ☆71Updated 4 years ago
• adki / Deep_Learning_Blocks
  DLB (Deep Learning Blocks) as a part of DPU (Deep Learning Processing Unit) is a collection of synthesizable Verilog modules for deep lea…
  ☆21Updated 4 months ago
• Gowtham1729 / Image-Processing
  Image Processing Toolbox in Verilog using Basys3 FPGA
  ☆221Updated 7 months ago
• mnmhdanas / DA-Based-LMS-Adaptive-filter
  Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…
  ☆16Updated 4 years ago
• muhammadaldacher / Analog-Design-of-1.5-bit-Pipeline-ADC-And-Boosted-OpAmp
  This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
  ☆37Updated 3 years ago
• AmrElsersy / DMA
  DMA Hardware Description with Verilog
  ☆18Updated 6 years ago
• mbits-mirafra / i3c_avip
  Verification IP project for I3C protocol
  ☆21Updated 9 months ago
• MostafaOkasha / ECHO-and-FIR-FILTER-implementation-on-Verilog-HDL
  Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…
  ☆10Updated 6 years ago
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆112Updated 2 weeks ago
• hibagus / 64pointFFTProcessor
  Synthesizeable VHDL and Verilog implementation of 64-point FFT/IFFT Processor with Q4.12 Fixed Point Data Format.
  ☆34Updated 5 years ago
• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆35Updated 2 years ago
• ShonTaware / RISC-V_Core_4_Stage
  RISCV MYTH 4 stage pipelined core designed using TL-Verilog and supports RV32I base integer instruction set
  ☆15Updated 4 years ago
• Bowen-0x00 / cordic-algorithm-verilog
  使用Cordic算法函数运算，在资源受限的设备上运行（如资源较少的FPGA、嵌入式MCU），避免了浮点运算、乘法、除法，只用移位和加法函数的计算。
  ☆11Updated last year
• mongrelgem / Verilog-Adders
  Implementing Different Adder Structures in Verilog
  ☆76Updated 6 years ago
• yohanes-erwin / zynq7000
  [Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol
  ☆19Updated 5 years ago
• falwat / code_repo
  My code repositry for common use.
  ☆23Updated 3 years ago