tinymlcontest / tinymlcontest2022_demo_exampleLinks
☆26Updated 2 years ago
Alternatives and similar repositories for tinymlcontest2022_demo_example
Users that are interested in tinymlcontest2022_demo_example are comparing it to the libraries listed below
Sorting:
- [ICCAD'22 TinyML Contest] Efficient Heart Stroke Detection on Low-cost Microcontrollers☆15Updated 2 years ago
- [ICASSP'20] DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architecture…☆25Updated 3 years ago
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆95Updated 4 years ago
- CMix-NN: Mixed Low-Precision CNN Library for Memory-Constrained Edge Devices☆48Updated 5 years ago
- Approximate layers - TensorFlow extension☆26Updated 8 months ago
- ☆19Updated 4 years ago
- ☆71Updated 5 years ago
- ☆31Updated 8 months ago
- Designs for finalist teams of the DAC System Design Contest☆37Updated 5 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆22Updated 4 years ago
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆28Updated last year
- Static Block Floating Point Quantization for CNN☆37Updated 4 years ago
- ☆26Updated 3 years ago
- BSQ: Exploring Bit-Level Sparsity for Mixed-Precision Neural Network Quantization (ICLR 2021)☆42Updated 4 years ago
- ☆35Updated 6 years ago
- ☆72Updated 2 years ago
- DAC System Design Contest 2020☆29Updated 5 years ago
- This repository containts the pytorch scripts to train mixed-precision networks for microcontroller deployment, based on the memory contr…☆50Updated last year
- My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, …☆53Updated 2 years ago
- A tool to deploy Deep Neural Networks on PULP-based SoC's☆91Updated 4 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆45Updated 5 years ago
- Quantized Training for Convolutional Neural Networks using Xilinx Brevitas☆12Updated 3 years ago
- An FPGA Accelerator for Transformer Inference☆92Updated 3 years ago
- ☆10Updated 2 years ago
- ☆64Updated 5 years ago
- PyTorch implementation of DiracDeltaNet from paper Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs☆33Updated 6 years ago
- ☆23Updated 4 years ago
- A FPGA-based neural network inference accelerator, which won the third place in DAC-SDC☆28Updated 3 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)☆53Updated 4 years ago
- Quantized ResNet50 Dataflow Acceleration on Alveo, with PYNQ☆59Updated 4 years ago