jamesgraves / licheerv-debian-linux
Build scripts for creating a Debian GNU/Linux image for the Lichee RV RISC-V board
☆12Updated 5 months ago
Alternatives and similar repositories for licheerv-debian-linux:
Users that are interested in licheerv-debian-linux are comparing it to the libraries listed below
- Sipeed Lichee RV Allwinner D1 RISC-V☆27Updated 2 years ago
- ☆43Updated 3 years ago
- Wrapper to Sipeed LicheeRV Nezha CM C906 boot0, opensbi, u-boot, kernel with tiny initramfs☆29Updated 2 years ago
- FPGA 80186 IBM PC compatible system for Altera Cyclone IV (EP4CE15F23/EP4CE55F23)☆21Updated 3 years ago
- buildroot fork☆35Updated this week
- build mainline SBI and Linux for allwinner D1 nezha board☆10Updated 3 years ago
- A very simple RISC-V ISA emulator.☆37Updated 4 years ago
- A baremetal experiment of Allwinner D1, without FEL☆31Updated last year
- quake for k210☆46Updated 5 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- ☆17Updated 6 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆12Updated 2 years ago
- Easy setup of GoWin FPGA SDK on Linux. A single script (main_launcher) automates all the critical steps and quickly fires up the IDE.☆21Updated 4 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆50Updated last year
- VGA-compatible text mode functionality☆16Updated 4 years ago
- Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM☆24Updated 2 years ago
- Dual-core RISC-V SoC with JTAG, atomics, SDRAM☆23Updated 3 years ago
- AGM bitstream utilities and decoded files from Supra☆41Updated 10 months ago
- CH32V UF2 bootloader☆44Updated 6 months ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆27Updated 5 years ago
- An USB to Serial bridge based on CH55x series MCU.☆22Updated 6 months ago
- WCH CH569 SerDes Reverse Engineering☆26Updated 2 years ago
- A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set☆60Updated 2 months ago
- Flashing Pano Logic thin clients without a programmer☆40Updated 2 years ago
- sn76489an compatible Verilog core, with emphasis on FPGA implementation and Megadrive/Master System compatibility☆30Updated last month
- Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K☆24Updated 2 years ago
- A simple 6502 system built on a Lattice Ultra Plus 5k FPGA☆10Updated 5 years ago
- A low cost FPGA development board based on Lattice iCE40UP5k and Raspberry Pi RP2040.☆41Updated 2 years ago
- A serial text terminal written in Verilog for Tang SiPeed Primer FPGA☆15Updated 3 years ago
- A blinky project for the ULX3S v3.0.3 FPGA board☆16Updated 6 years ago