Network Development Kit (NDK) for FPGA cards with example application
☆91Mar 17, 2026Updated this week
Alternatives and similar repositories for ndk-fpga
Users that are interested in ndk-fpga are comparing it to the libraries listed below
Sorting:
- ☆25Updated this week
- Reducing P4 Language’s Voluminosity using Higher-Level Constructs☆15Oct 15, 2022Updated 3 years ago
- Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)☆27Jul 11, 2024Updated last year
- Testbed for testing NetFlow/IPFIX network monitoring probes. Includes tools for PCAP generation and replay of 1/10/100G network traffic.☆57Mar 6, 2026Updated 2 weeks ago
- Open FPGA Modules☆24Oct 8, 2024Updated last year
- A huge VHDL library for FPGA and digital ASIC development☆450Mar 13, 2026Updated last week
- Always wanted to write performant P4 based networking application in Go but don't know where to start? Then this is the place to get to. …☆18Feb 24, 2023Updated 3 years ago
- ESnet general-purpose FPGA design library.☆14Feb 18, 2026Updated last month
- ESnet SmartNIC hardware design repository.☆61Mar 11, 2026Updated last week
- A P4 compiler☆135Mar 13, 2026Updated last week
- P4 formalization using Ott and HOL4☆18Feb 24, 2026Updated 3 weeks ago
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆200Updated this week
- Ideas for P4 Projects.☆15Sep 18, 2024Updated last year
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆65Nov 7, 2025Updated 4 months ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆42Sep 22, 2025Updated 5 months ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- Interface definitions for VHDL-2019.☆34Mar 1, 2026Updated 2 weeks ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆72Dec 17, 2025Updated 3 months ago
- ☆14Dec 10, 2022Updated 3 years ago
- ☆15May 23, 2024Updated last year
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆40Feb 24, 2025Updated last year
- An open-source HDL register code generator fast enough to run in real time.☆84Updated this week
- Hardware Snappy decompressor☆11Sep 11, 2024Updated last year
- Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol☆43Mar 5, 2026Updated 2 weeks ago
- Open Logic FPGA Standard Library☆899Mar 10, 2026Updated last week
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 3 years ago
- Native In-Kernel P4-programmable Software Switch for Software-Defined Networking (previously PSA-eBPF)☆48Nov 24, 2025Updated 3 months ago
- ☆20Mar 10, 2026Updated last week
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.☆74Feb 18, 2026Updated last month
- Package manager and build system for VHDL, Verilog, and SystemVerilog☆63Mar 9, 2026Updated last week
- VHDL library of high abstraction level synthesizable mathematical functions for multiplication, division and sin/cos functionalities and …☆23Oct 29, 2025Updated 4 months ago
- ☆17Jul 9, 2014Updated 11 years ago
- Style guide enforcement for VHDL☆235Feb 5, 2026Updated last month
- Artifacts for the "SurgeProtector: Mitigating Temporal Algorithmic Complexity Attacks using Adversarial Scheduling" paper that appears in…☆12Jun 24, 2022Updated 3 years ago
- DSSS Wireless transmit-receive system in VHDL☆14Dec 19, 2017Updated 8 years ago
- Python Utilities to use Xilinx Vivado Tools from Python Scripts☆22Oct 18, 2020Updated 5 years ago
- ChipScope / ILA using XVC (XIlinx Virtual Cable Over PCIe) with a PR (Partial Reconfiguration) design Example.☆14Jun 1, 2017Updated 8 years ago
- hardware library for hwt (= ipcore repo)☆44Dec 23, 2025Updated 2 months ago
- Ensō is a high-performance streaming interface for NIC-application communication.☆78Mar 6, 2026Updated 2 weeks ago