cmu-snap / SurgeProtectorLinks
Artifacts for the "SurgeProtector: Mitigating Temporal Algorithmic Complexity Attacks using Adversarial Scheduling" paper that appears in SIGCOMM '22.
☆12Updated 3 years ago
Alternatives and similar repositories for SurgeProtector
Users that are interested in SurgeProtector are comparing it to the libraries listed below
Sorting:
- IRN's packet processing logic synthesized using Xilinx Vivado HLS☆23Updated 6 years ago
- Artifacts for the "BBQ: A Fast and Scalable Integer Priority Queue for Hardware Packet Scheduling" paper that appears in NSDI '24.☆19Updated last year
- Artifacts for the "Caching with Delayed Hits" paper that appears in SIGCOMM '20.☆21Updated 4 years ago
- A Fast, Scalable and Programmable Packet Scheduler in Hardware☆38Updated 6 years ago
- Packet simulator for data center network topologies, routing, and congestion control☆62Updated 7 years ago
- Packet-level simulation code to model Opera and other networks from the 2020 NSDI paper "Expanding across time to deliver bandwidth effic…☆11Updated 5 years ago
- ☆46Updated 3 years ago
- Twenty Years After: Hierarchical Core-Stateless Fair Queueing☆16Updated 4 years ago
- ☆20Updated 2 years ago
- Yet Another Packet Simulator (YAPS)☆42Updated 8 years ago
- NDP datacenter stack☆78Updated 2 years ago
- The Domino compiler to run packet programs on pipelined switches☆29Updated 4 years ago
- An infrastructure for inline acceleration of network applications☆30Updated 3 years ago
- NSDI 19: Is advance knowledge of flow sizes a plausible assumption?☆28Updated 6 years ago
- This is an official GitHub repository for the paper, "Towards timeout-less transport in commodity datacenter networks.".☆16Updated 3 years ago
- QJump NS patches and driver scripts☆13Updated 10 years ago
- ☆32Updated 4 years ago
- ☆22Updated 4 years ago
- ☆20Updated 4 years ago
- A Programmable Hardware Architecture for Network Transport Logic☆35Updated 3 years ago
- ☆14Updated 2 years ago
- DeepMatch: Practical Deep Packet Inspection in the Data Plane using Network Processors☆15Updated 4 years ago
- Cebinae: Scalable In-network Fairness Augmentation (SIGCOMM 2022)☆21Updated 3 years ago
- P4 compatible HLS modules☆11Updated 7 years ago
- Repository for the Performance Interface eXtractor (PIX) tool presented at NSDI'22.☆16Updated 3 years ago
- NeuroCuts is a deep RL algorithm for generating optimized packet classification trees.☆75Updated 5 years ago
- An Agile Chisel-Based SoC Design Framework☆26Updated 3 years ago
- ☆23Updated last year
- FlowBlaze: Stateful Packet Processing in Hardware☆70Updated 2 years ago
- This is the p4 code for LossRadar (CoNext' 16) data plane☆13Updated 8 years ago