A work-in-progress board-level hardware description language (HDL) providing design automation through generators and block polymorphism.
☆87Jun 10, 2026Updated this week
Alternatives and similar repositories for PolymorphicBlocks
Users that are interested in PolymorphicBlocks are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- RISCV Core written in Calyx☆17Aug 16, 2024Updated last year
- experimental procedural PCB layout program☆261Jun 1, 2026Updated last week
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- A Python to VHDL compiler☆17Apr 28, 2025Updated last year
- ☆28Jun 3, 2026Updated last week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Reticle evaluation (PLDI 2021)☆12Apr 12, 2021Updated 5 years ago
- Build circuits like legos!☆11Jun 22, 2025Updated 11 months ago
- Calling a python function from SV, then have this python function call SV tasks. Useful for coding register sequences in python☆12Sep 23, 2022Updated 3 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- DVI video out example for prjtrellis☆17Jan 20, 2019Updated 7 years ago
- ☆17Mar 26, 2026Updated 2 months ago
- 21st century electronic design automation tools, written in Rust.☆37Updated this week
- Typst template mimicking acmart latex class☆33Jan 2, 2026Updated 5 months ago
- Template Verilator project for beginners☆13Feb 2, 2023Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Analyze experimental data with Programming by Navigation☆17Updated this week
- Algorithms and dataset of autorouting problems for developing and benchmarking autorouters☆50Aug 15, 2025Updated 9 months ago
- Alfred workflow for tracking habits with Habitica☆11Jan 1, 2019Updated 7 years ago
- A lighweight and parallel snapshot testing framework in rust☆40Aug 17, 2023Updated 2 years ago
- A Hardware Pipeline Description Language☆60Jul 12, 2025Updated 10 months ago
- Chisel library for Unum Type-III Posit Arithmetic☆46Apr 2, 2025Updated last year
- Analog Circuit Simulator☆26Sep 6, 2024Updated last year
- Python curses-based tool for configuring STM32 pins.☆15Apr 1, 2022Updated 4 years ago
- An Open-Source Full-Custom Silicon Compiler for High-Performance FPGA Fabrics☆15Jun 3, 2026Updated last week
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆17Jan 16, 2017Updated 9 years ago
- Verilog AST☆21Dec 2, 2023Updated 2 years ago
- Automatic SystemVerilog linting in github actions with the help of Verible☆37Oct 23, 2024Updated last year
- Integrated Circuit Layout☆62Feb 25, 2025Updated last year
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 4 years ago
- PCB Design Language: A programming way to design schematics.☆192Apr 8, 2021Updated 5 years ago
- Fearless hardware design☆205Aug 20, 2025Updated 9 months ago
- My personal color scheme for KiCad☆23Feb 25, 2024Updated 2 years ago
- Refazer: Learning Program Transformations from Examples☆30Mar 25, 2018Updated 8 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆22Dec 20, 2019Updated 6 years ago
- Examples and design pattern for VHDL verification☆15Apr 10, 2016Updated 10 years ago
- 🦀 No-nonsense hardware testing/simulation in Rust 🛠️ | Verilog, Spade, Veryl☆107May 3, 2026Updated last month
- A Language and Live Runtime for Styling and Labeling Typeset Math Formulas☆26Oct 29, 2023Updated 2 years ago
- Naive Educational RISC-V -- A simple single-stage RV32I processor☆28Nov 3, 2020Updated 5 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆48Feb 12, 2026Updated 3 months ago
- Open source Photonics PDK for VTT's 3 um SOI platform.☆14Updated this week