Alternatives and similar repositories for EEcircuit

Users that are interested in EEcircuit are comparing it to the libraries listed below

• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆53Updated 2 years ago
• dteal / gdsiistl
  Converts GDSII files to STL files.
  ☆46Updated 5 years ago
• wrcad / xictools
  XicTools: Xic graphical editor, WRspice circuit simulator, and accessories. for electronic design.
  ☆167Updated last week
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆80Updated 2 months ago
• Isotel / mixedsim
  Hardware Design Tool - Mixed Signal Simulation with Verilog
  ☆79Updated 6 months ago
• dwarning / VA-Models
  Verilog-A simulation models
  ☆74Updated last week
• iic-jku / analog-circuit-design
  Course material for a basic hands-on analog circuit design course with IC emphasis
  ☆123Updated last week
• ngspice / ngspice
  ☆167Updated last year
• efabless / foss-asic-tools
  FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…
  ☆85Updated 10 months ago
• eskiyerli / revedaRelease
  This repository is for (pre-)release versions of the Revolution EDA.
  ☆42Updated 3 weeks ago
• pascalkuthe / OpenVAF
  An innovative Verilog-A compiler
  ☆155Updated 10 months ago
• dreoilin / pygmid
  A python3 gm/ID starter kit
  ☆49Updated 9 months ago
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆65Updated 2 months ago
• StefanSchippers / xschem
  A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy an…
  ☆389Updated this week
• Lenty / SLiCAP_python
  Open-source version of SLiCAP, implemented in python
  ☆36Updated 6 months ago
• arpadbuermen / OpenVAF
  An innovative Verilog-A compiler
  ☆23Updated 3 weeks ago
• mbalestrini / gdsiistl
  Converts GDSII files to STL files.
  ☆37Updated last year
• wulffern / aicex
  Files for Advanced Integrated Circuits
  ☆29Updated last month
• ACMmodel / MOSFET_model
  A simple MOSFET model with only 5-DC-parameters for circuit simulation
  ☆42Updated last year
• efabless / openlane2
  The next generation of OpenLane, rewritten from scratch with a modular architecture
  ☆301Updated 4 months ago
• sscs-ose / sscs-ose-code-a-chip.github.io
  IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
  ☆184Updated last month
• aidangoettsch / asg
  An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.
  ☆25Updated 4 years ago
• KenKundert / flicker-noise
  How to correctly write a flicker-noise model for RF simulation.
  ☆22Updated 2 years ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 7 years ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆49Updated 4 months ago
• mineda-support / ICPS2023_5
  ☆53Updated 4 months ago
• DDD-FIT-CTU / CMOS-SPICE-Model-Collections
  MOSIS MPW Test Data and SPICE Models Collections
  ☆37Updated 5 years ago
• medwatt / gmid
  Python script for generating lookup tables for the gm/ID design methodology and much more ...
  ☆90Updated 2 months ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆63Updated last month
• nunobrum / spicelib
  Python library to interact with spice simulators such as LTSpice, QSPICE, NGSpice and others.
  ☆66Updated last week