FilMarini / FPGA_CDR_core
FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz
☆15Updated 3 years ago
Alternatives and similar repositories for FPGA_CDR_core:
Users that are interested in FPGA_CDR_core are comparing it to the libraries listed below
- I2C Master and Slave☆32Updated 9 years ago
- ☆28Updated 5 years ago
- QSPI for SoC☆19Updated 5 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆68Updated 2 years ago
- USB 2.0 Device IP Core☆53Updated 7 years ago
- UART -> AXI Bridge☆60Updated 3 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆62Updated last year
- FPGA Technology Exchange Group相关文件管理☆41Updated last year
- 100 MB/s Ethernet MAC Layer Switch☆14Updated 10 years ago
- This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块:UART接收器、UART发送器、UART转AXI4交互式调…☆134Updated last year
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆19Updated 2 weeks ago
- ☆53Updated 2 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆47Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆61Updated 4 years ago
- SPI Slave for FPGA in Verilog and VHDL☆191Updated 8 months ago
- I2C controller core☆35Updated 2 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆61Updated 2 years ago
- FPGA Logic Analyzer and GUI☆114Updated 2 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz☆68Updated 3 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆90Updated 4 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆46Updated 2 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆42Updated 6 months ago
- FPGA和USB3.0桥片实现USB3.0通信☆57Updated 3 years ago
- I2C slave Verilog Design and TestBench☆20Updated 5 years ago
- Gigabit Ethernet UDP communication driver☆71Updated 5 years ago
- Title : Communication Bridge between I2C and SPI Platform : RTL Coding (Verilog/System Verilog/VHDL) Duration : 1 Month Description : Bot…☆17Updated 6 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆66Updated 7 months ago
- An CAN bus Controller implemented in Verilog☆44Updated 9 years ago
- SPI-Flash XIP Interface (Verilog)☆35Updated 3 years ago