MadLittleMods / vga-simulator
☆16Updated last year
Alternatives and similar repositories for vga-simulator:
Users that are interested in vga-simulator are comparing it to the libraries listed below
- Wishbone interconnect utilities☆39Updated 2 months ago
- A CPU on an FPGA that you can play Zork on☆49Updated 8 years ago
- An open source FPGA PCI core & 8250-Compatible PCI UART core☆41Updated 4 years ago
- A System on a Chip Implementation for the XuLA2-LX25 board☆17Updated 6 years ago
- RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32☆45Updated last year
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆25Updated 2 months ago
- Featherweight RISC-V implementation☆52Updated 3 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Small Processing Unit 32: A compact RV32I CPU written in Verilog☆69Updated 2 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆20Updated last year
- Spen's Official OpenOCD Mirror☆49Updated last month
- Computer architecture learning environment using FPGAs☆13Updated 3 years ago
- Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.☆8Updated last year
- Miscellaneous ULX3S examples (advanced)☆77Updated last month
- Reusable Verilog 2005 components for FPGA designs☆42Updated 2 months ago
- A Fully Open-Source Verilog-to-PCB Flow☆21Updated 9 months ago
- A complete HDMI transmitter implementation in VHDL☆23Updated 3 months ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated 11 months ago
- Quick'n'dirty FuseSoC+cocotb example☆18Updated 5 months ago
- SoftCPU/SoC engine-V☆54Updated last month
- Portable HyperRAM controller☆54Updated 4 months ago
- Using VexRiscv without installing Scala☆38Updated 3 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆50Updated 3 months ago
- Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.☆59Updated 3 years ago
- A Risc-V SoC for Tiny Tapeout☆16Updated last month
- Documentation and tools related to DECA FPGA board☆21Updated last year
- USB 2.0 FS Device controller IP core written in SystemVerilog☆36Updated 6 years ago
- ☆33Updated 4 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆61Updated 6 years ago
- Tester for IS61WV5128BLL-10BLI SRAM in Cmod A7-35T☆18Updated 6 years ago