Alternatives and similar repositories for cacheflow

Users that are interested in cacheflow are comparing it to the libraries listed below

• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆46Updated this week
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago
• shacron / sled
  Sled System Emulator
  ☆28Updated this week
• stephenrkell / elftin
  Rag-bag of utilities and scripts that do strange things with ELF files
  ☆17Updated 7 months ago
• eigenform / lamina
  Microbenchmarking experiments on Zen 2 machines
  ☆20Updated 3 years ago
• dougallj / asil
  ☆33Updated last year
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆25Updated 7 years ago
• YosysHQ / abc
  ABC: System for Sequential Logic Synthesis and Formal Verification
  ☆29Updated last month
• can-lehmann / pathbeaver
  Symbolic execution of LLVM IR
  ☆13Updated last year
• jwnhy / rvbt
  Baremetal Backtracing on RISC-V
  ☆15Updated 4 years ago
• Kuree / fsim
  Fiber-based SystemVerilog Simulator.
  ☆25Updated 3 years ago
• opencompl / mlir-fuzz
  A enumerator for MLIR, relying on the information given by IRDL.
  ☆18Updated this week
• Javier-varez / p1c0
  An embedded OS for Apple M1 Pro chipsets
  ☆18Updated 2 years ago
• jowinter / dmacu
  Minimal CPU Emulator Powered by the ARM PL080 DMA Controller
  ☆36Updated last year
• amaranth-lang / amaranth-yosys
  WebAssembly-based Yosys distribution for Amaranth HDL
  ☆28Updated last month
• oxidecomputer / quartz
  Soft-logic designs and HAL libraries for various subsystems found in Oxide hardware.
  ☆14Updated last week
• deater / deterministic
  code for examining determinism of performance counters
  ☆21Updated 4 years ago
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆79Updated last week
• thoughtpolice / yosys-bluespec
  Yosys plugin for synthesis of Bluespec code
  ☆15Updated 4 years ago
• blitz / kernel_entry_benchmark
  Microbenchmarks for x86_64 kernel entry methods
  ☆19Updated 3 years ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆45Updated last month
• elliottt / easy-smt
  Easy SMT solver interaction
  ☆34Updated 2 months ago
• MPACT-ORG / mpact-compiler
  Retargetable ML compilers for the twenty-first century!
  ☆13Updated 5 months ago
• daniellustig / coatcheck
  COATCheck
  ☆13Updated 6 years ago
• tomahawkins / verilog
  A Verilog parser for Haskell.
  ☆36Updated 4 years ago
• tobiasgrosser / polyhedral.info
  ☆21Updated 2 years ago
• rsnikhil / RISCV_ISA_Spec_Tour
  Tutorial tour of the RISC-V ISA Spec (expressed in SAIL ISA spec language)
  ☆37Updated 4 years ago
• iximeow / yaxpeax-dis
  yaxdis, a small and naive disassembler using yaxpeax decoders
  ☆34Updated 5 months ago
• andreas-abel / uiCA-eval
  Files used for the evaluation of uiCA
  ☆18Updated 2 years ago
• hamsternz / lfsr_scramblers
  Experiments with self-synchronizing LFSR scramblers
  ☆15Updated 5 years ago