Alternatives and similar repositories for sail-arm

Users that are interested in sail-arm are comparing it to the libraries listed below

• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆64Updated last month
• alastairreid / asl-interpreter
  Example implementation of Arm's Architecture Specification Language (ASL)
  ☆44Updated 2 months ago
• ARM-software / asl-interpreter
  Example implementation of Arm's Architecture Specification Language (ASL)
  ☆119Updated 5 years ago
• rems-project / isla
  Symbolic execution tool for Sail ISA specifications
  ☆77Updated last month
• alastairreid / mra_tools
  Tools to process ARM's Machine Readable Architecture Specification
  ☆133Updated 5 years ago
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆56Updated last month
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• CTSRD-CHERI / llvm-project
  Fork of LLVM adding CHERI support
  ☆56Updated this week
• rems-project / rmem
  rmem public repo
  ☆46Updated 3 months ago
• mit-plv / kami
  A Platform for High-Level Parametric Hardware Specification and its Modular Verification
  ☆158Updated last month
• bchurchill / pldi19-equivalence-checker
  Source code for the equivalence checker presented in the PLDI 2019 paper, "Semantic Program Alignment for Equivalence Checking"
  ☆44Updated 5 years ago
• CTSRD-CHERI / qemu
  QEMU with support for CHERI
  ☆59Updated last week
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆44Updated last month
• draperlaboratory / VIBES
  Verified, Incremental, Binary Editing with Synthesis
  ☆52Updated 2 years ago
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆106Updated last week
• sgpthomas / comp-gen
  Automatically generate a compiler using equality saturation
  ☆30Updated last year
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆81Updated this week
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆23Updated 4 years ago
• martin-cs / symfpu
  A (concrete or symbolic) implementation of IEEE-754 / SMT-LIB floating-point
  ☆40Updated 5 months ago
• Gy-Hu / E-Syn2
  E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)
  ☆20Updated last month
• SRI-CSL / l3riscv
  An executable specification of the RISCV ISA in L3.
  ☆42Updated 6 years ago
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆77Updated this week
• project-oak / silveroak
  Formal specification and verification of hardware, especially for security and privacy.
  ☆127Updated 3 years ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆73Updated 4 years ago
• daniellustig / coatcheck
  COATCheck
  ☆13Updated 6 years ago
• riscv / riscv-cfi
  This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …
  ☆92Updated 3 weeks ago
• daniellustig / pipecheck
  ☆19Updated 10 years ago
• IntelLabs / asl-interpreter
  Interpreter and compiler for the ISA specification language "Architecture Specification Language" (ASL)
  ☆21Updated 3 weeks ago
• shack / synth
  Synthesis of loop-free programs
  ☆19Updated last week
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago