Alternatives and similar repositories for sail-arm

Users that are interested in sail-arm are comparing it to the libraries listed below

• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆64Updated 2 months ago
• alastairreid / asl-interpreter
  Example implementation of Arm's Architecture Specification Language (ASL)
  ☆44Updated 2 weeks ago
• rems-project / isla
  Symbolic execution tool for Sail ISA specifications
  ☆78Updated 3 weeks ago
• CTSRD-CHERI / TestRIG
  Testing processors with Random Instruction Generation
  ☆46Updated last month
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆83Updated this week
• rems-project / rmem
  rmem public repo
  ☆48Updated 4 months ago
• IntelLabs / asl-interpreter
  Interpreter and compiler for the ISA specification language "Architecture Specification Language" (ASL)
  ☆24Updated 3 weeks ago
• TeamVoss / VossII
  The source code to the Voss II Hardware Verification Suite
  ☆56Updated 2 weeks ago
• alastairreid / mra_tools
  Tools to process ARM's Machine Readable Architecture Specification
  ☆133Updated 5 years ago
• daniellustig / coatcheck
  COATCheck
  ☆13Updated 6 years ago
• agurfinkel / btor2mlir
  BTOR2 MLIR project
  ☆26Updated last year
• mit-plv / kami
  A Platform for High-Level Parametric Hardware Specification and its Modular Verification
  ☆161Updated 2 months ago
• CTSRD-CHERI / llvm-project
  Fork of LLVM adding CHERI support
  ☆57Updated last week
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆79Updated last week
• CTSRD-CHERI / qemu
  QEMU with support for CHERI
  ☆59Updated this week
• stanford-centaur / pono
  Pono: A flexible and extensible SMT-based model checker
  ☆110Updated this week
• bchurchill / pldi19-equivalence-checker
  Source code for the equivalence checker presented in the PLDI 2019 paper, "Semantic Program Alignment for Equivalence Checking"
  ☆45Updated 5 years ago
• project-oak / silveroak
  Formal specification and verification of hardware, especially for security and privacy.
  ☆126Updated 3 years ago
• daniellustig / pipecheck
  ☆19Updated 10 years ago
• cristian-mattarei / CoSA
  CoreIR Symbolic Analyzer
  ☆74Updated 4 years ago
• sgpthomas / comp-gen
  Automatically generate a compiler using equality saturation
  ☆30Updated last year
• CTSRD-CHERI / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆32Updated this week
• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆23Updated 4 years ago
• Gy-Hu / E-Syn2
  E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)
  ☆21Updated 3 months ago
• mit-plv / riscv-coq
  RISC-V Specification in Coq
  ☆116Updated 3 weeks ago
• mit-plv / koika
  A core language for rule-based hardware design 🦑
  ☆161Updated 3 months ago
• bitwuzla / bitwuzla
  Bitwuzla is a Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, floating-point arithmetic, arrays a…
  ☆281Updated this week
• uclid-org / uclid
  UCLID5: formal modeling, verification, and synthesis of computational systems
  ☆149Updated 2 months ago
• mit-plv / riscv-semantics
  A formal semantics of the RISC-V ISA in Haskell
  ☆170Updated 2 years ago
• SRI-CSL / l3riscv
  An executable specification of the RISCV ISA in L3.
  ☆42Updated 6 years ago