ARM-software / asl-interpreterLinks
Example implementation of Arm's Architecture Specification Language (ASL)
☆118Updated 5 years ago
Alternatives and similar repositories for asl-interpreter
Users that are interested in asl-interpreter are comparing it to the libraries listed below
Sorting:
- Tools to process ARM's Machine Readable Architecture Specification☆131Updated 5 years ago
- Example implementation of Arm's Architecture Specification Language (ASL)☆44Updated 3 weeks ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆80Updated 2 weeks ago
- rmem public repo☆43Updated last month
- Semantics of x86-64 in K☆156Updated 5 years ago
- Source code for the equivalence checker presented in the PLDI 2019 paper, "Semantic Program Alignment for Equivalence Checking"☆43Updated 5 years ago
- A (concrete or symbolic) implementation of IEEE-754 / SMT-LIB floating-point☆40Updated 4 months ago
- Fork of LLVM adding CHERI support☆58Updated 2 weeks ago
- Visualization of LLVM IR☆60Updated 11 years ago
- Symbolic execution tool for Sail ISA specifications☆73Updated this week
- Verified, Incremental, Binary Editing with Synthesis☆52Updated 2 years ago
- Generates CIL MLIR dialect from C/C++ source.☆34Updated 4 years ago
- Automatic inference of a formal specification of the x86_64 instruction set☆70Updated 9 years ago
- Experimental translation of llvm to smt.☆57Updated 5 years ago
- CCG is a random C Code Generator☆44Updated 2 years ago
- print information from LLVM dataflow analyses☆13Updated 5 years ago
- Verification of BPF JIT compilers☆55Updated 2 years ago
- Automatic Binary Parallelisation☆43Updated 4 months ago
- QEMU with support for CHERI☆58Updated 2 weeks ago
- CHERI-RISC-V model written in Sail☆60Updated 3 weeks ago
- Generate project templates for executables that use LLVM and LLVM passes☆52Updated 3 years ago
- DebugIR: Debugging LLVM-IR Files☆139Updated 7 months ago
- Liveness-driven random C code generator☆41Updated last year
- UB-aware interpreter for LLVM debugging☆29Updated 3 weeks ago
- llvm opt fuzzer and bounded exhaustive test generator☆40Updated 2 years ago
- A verification tool for many memory models☆96Updated last week
- LLVM Assembler adding Debug Information at IR Level.☆33Updated 6 years ago
- ☆52Updated 9 years ago
- Alive: Automatic LLVM's Instcombine Verifier☆221Updated 2 years ago
- Bitwuzla is a Satisfiability Modulo Theories (SMT) solver for the theories of fixed-size bit-vectors, floating-point arithmetic, arrays a…☆261Updated last week