CTSRD-CHERI / llvm-projectLinks
Fork of LLVM adding CHERI support
☆56Updated this week
Alternatives and similar repositories for llvm-project
Users that are interested in llvm-project are comparing it to the libraries listed below
Sorting:
- QEMU with support for CHERI☆59Updated last month
- Easily build and run CHERI related projects☆77Updated this week
- Example implementation of Arm's Architecture Specification Language (ASL)☆119Updated 5 years ago
- CHERI C/C++ Programming Guide☆34Updated last week
- rmem public repo☆45Updated 2 months ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆85Updated last month
- Working Draft of the RISC-V J Extension Specification☆190Updated 2 months ago
- UB-aware interpreter for LLVM debugging☆29Updated last week
- Tools to process ARM's Machine Readable Architecture Specification☆133Updated 5 years ago
- CHERI-RISC-V model written in Sail☆62Updated 3 weeks ago
- Some experiments with SMT solvers and GIMPLE IR☆75Updated this week
- Example implementation of Arm's Architecture Specification Language (ASL)☆44Updated last month
- CheriOS -- a minimal microkernel that demonstrates "clean-slate" CHERI memory protection and object capabilities☆41Updated 2 years ago
- Mirror of InriaForge SSABook repository: https://gforge.inria.fr/projects/ssabook/ (was scheduled for retirement at the end of 2020, was …☆142Updated 5 years ago
- Embedded Universal DSL: a good DSL for us, by us☆42Updated this week
- Verification of BPF JIT compilers☆55Updated 2 years ago
- Symbolic execution tool for Sail ISA specifications☆76Updated 3 weeks ago
- Some experiments with SMT solvers and GIMPLE IR☆38Updated last year
- A verification tool for many memory models☆100Updated this week
- FreeBSD adapted for CHERI-RISC-V and Arm Morello.☆181Updated this week
- A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one☆76Updated this week
- This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …☆90Updated last week
- A translation validation framework for MLIR☆88Updated 4 months ago
- Semantics of x86-64 in K☆156Updated 5 years ago
- llvm opt fuzzer and bounded exhaustive test generator☆40Updated 2 years ago
- Assembly super-optimization via constraint solving☆213Updated this week
- No-assurance libraries for rapid-prototyping of seL4 apps.☆55Updated last week
- An LLVM IR dataset for data-driven compiler optimization research☆51Updated this week
- A (concrete or symbolic) implementation of IEEE-754 / SMT-LIB floating-point☆40Updated 4 months ago
- Top-level repository for LFI: Practical, Efficient, and Secure Software-based Sandboxing☆85Updated this week