dougallj / asilLinks
☆33Updated last year
Alternatives and similar repositories for asil
Users that are interested in asil are comparing it to the libraries listed below
Sorting:
- Instruction latency & throughput profiler for AArch64☆40Updated 4 months ago
- Microbenchmarking experiments on Zen 2 machines☆20Updated 3 years ago
- Sled System Emulator☆28Updated last month
- A low-level intermediate representation for hardware description languages☆28Updated 5 years ago
- GNU Superoptimizer Version 2☆26Updated 4 years ago
- ☆50Updated last week
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆90Updated last month
- x86-64, ARM, and RVV intrinsics viewer☆76Updated last month
- CacheFlow is a Linux kernel module that exposes the contents of the last-level cache on *most* ARM machines.☆17Updated last year
- A minimal (really) out-of-tree MLIR example☆46Updated 4 months ago
- A description of Minotaur can be found in https://arxiv.org/abs/2306.00229.☆119Updated this week
- CPU Ultimate Latency Test.☆117Updated 3 months ago
- Reviving the old comp-arch.net wiki?☆18Updated 2 years ago
- Apple Firestorm/Icestorm CPU microarchitecture docs☆247Updated 2 years ago
- A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one☆82Updated last week
- Table of ARM SoC and their features☆61Updated 3 weeks ago
- Embedded Universal DSL: a good DSL for us, by us☆60Updated this week
- Measures microarchitectural details such as ROB size. Like https://github.com/travisdowns/robsize but without runtime code generation, wh…☆132Updated 4 years ago
- Videocore Backend for llvm☆23Updated 10 years ago
- Microbenchmarks for x86_64 kernel entry methods☆19Updated 3 years ago
- Fork of LLVM with support for downgrading bitcode.☆19Updated 6 months ago
- Fork of LLVM for demonstrating optimization pass development☆31Updated 2 years ago
- Clairvoyance LLVM Tools. Instruction scheduling targeting long latency loads.☆14Updated 6 years ago
- Fork of LLVM adding CHERI support☆60Updated last week
- RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC☆101Updated 3 years ago
- RISC-V Instruction Set Metadata☆42Updated 7 years ago
- A (concrete or symbolic) implementation of IEEE-754 / SMT-LIB floating-point☆50Updated last month
- ☆22Updated 2 years ago
- Tools to process ARM's Machine Readable Architecture Specification☆136Updated 5 years ago
- Fiber-based SystemVerilog Simulator.☆25Updated 3 years ago