Alternatives and similar repositories for asil

Users that are interested in asil are comparing it to the libraries listed below

• embecosm / gso2
  GNU Superoptimizer Version 2
  ☆26Updated 4 years ago
• herumi / xbyak_riscv
  ☆48Updated 2 weeks ago
• ARM-software / asl-interpreter
  Example implementation of Arm's Architecture Specification Language (ASL)
  ☆119Updated 5 years ago
• ocxtal / insn_bench_aarch64
  Instruction latency & throughput profiler for AArch64
  ☆37Updated last month
• dzaima / intrinsics-viewer
  x86-64, ARM, and RVV intrinsics viewer
  ☆55Updated 4 months ago
• eigenform / lamina
  Microbenchmarking experiments on Zen 2 machines
  ☆19Updated 3 years ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆44Updated last week
• AndyGlew / comp-arch.net
  Reviving the old comp-arch.net wiki?
  ☆18Updated 2 years ago
• shacron / sled
  Sled System Emulator
  ☆28Updated 3 months ago
• weirdindiankid / cacheflow
  CacheFlow is a Linux kernel module that exposes the contents of the last-level cache on *most* ARM machines.
  ☆17Updated last year
• b-shi / PMC-PMI
  Performance Counter Measurements at the cycle granularity
  ☆18Updated 4 years ago
• rems-project / sail-arm
  Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model
  ☆87Updated last month
• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆44Updated this week
• asmjit / cult
  CPU Ultimate Latency Test.
  ☆110Updated 2 months ago
• phire / llvm
  Videocore Backend for llvm
  ☆22Updated 10 years ago
• alastairreid / mra_tools
  Tools to process ARM's Machine Readable Architecture Specification
  ☆133Updated 5 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 3 years ago
• blitz / kernel_entry_benchmark
  Microbenchmarks for x86_64 kernel entry methods
  ☆19Updated 3 years ago
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago
• hrw / arm-socs-table
  Table of ARM SoC and their features
  ☆58Updated last month
• gamozolabs / vectorized_mmu
  Snapshot of the vectorized MMU that lines up with the vectorized MMU blog
  ☆22Updated 5 years ago
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆77Updated this week
• preames / public-notes
  A collection of (public) notes on assorted topics
  ☆79Updated last week
• dtcxzyw / llvm-ub-aware-interpreter
  UB-aware interpreter for LLVM debugging
  ☆30Updated last week
• zwegner / x86-info-term
  A terminal viewer for x86 instruction/intrinsic information using Python 3 + curses
  ☆128Updated 2 years ago
• jdmccalpin / Intel_Address_Hash
  Use hardware performance counters to find mapping of addresses to L3 slices in Intel processors
  ☆16Updated 2 years ago
• ktran / clairvoyance
  Clairvoyance LLVM Tools. Instruction scheduling targeting long latency loads.
  ☆14Updated 6 years ago
• minotaur-toolkit / minotaur
  A description of Minotaur can be found in https://arxiv.org/abs/2306.00229.
  ☆110Updated last year
• andreas-abel / uiCA
  uops.info Code Analyzer
  ☆286Updated last year
• dtcxzyw / llvm-opt-benchmark
  An LLVM IR dataset for data-driven compiler optimization research
  ☆61Updated this week