Alternatives and similar repositories for asil

Users that are interested in asil are comparing it to the libraries listed below

• eigenform / lamina
  Microbenchmarking experiments on Zen 2 machines
  ☆21Updated 3 years ago
• embecosm / gso2
  GNU Superoptimizer Version 2
  ☆26Updated 4 years ago
• shacron / sled
  Sled System Emulator
  ☆28Updated 3 months ago
• ocxtal / insn_bench_aarch64
  Instruction latency & throughput profiler for AArch64
  ☆42Updated 5 months ago
• dzaima / intrinsics-viewer
  x86-64, ARM, and RVV intrinsics viewer
  ☆76Updated 2 months ago
• herumi / xbyak_riscv
  ☆50Updated last month
• AndyGlew / comp-arch.net
  Reviving the old comp-arch.net wiki?
  ☆18Updated 2 years ago
• weirdindiankid / cacheflow
  CacheFlow is a Linux kernel module that exposes the contents of the last-level cache on *most* ARM machines.
  ☆17Updated last year
• b-shi / PMC-PMI
  Performance Counter Measurements at the cycle granularity
  ☆18Updated 4 years ago
• alastairreid / mra_tools
  Tools to process ARM's Machine Readable Architecture Specification
  ☆136Updated 6 years ago
• zwegner / x86-info-term
  A terminal viewer for x86 instruction/intrinsic information using Python 3 + curses
  ☆128Updated 3 years ago
• travisdowns / robsize
  ROB size testing utility
  ☆159Updated 4 years ago
• preames / public-notes
  A collection of (public) notes on assorted topics
  ☆79Updated 5 months ago
• Veedrac / microarchitecturometer
  Measures microarchitectural details such as ROB size. Like https://github.com/travisdowns/robsize but without runtime code generation, wh…
  ☆132Updated 5 years ago
• asmjit / cult
  CPU Ultimate Latency Test.
  ☆117Updated 5 months ago
• JuliaLLVM / llvm-downgrade
  Fork of LLVM with support for downgrading bitcode.
  ☆21Updated 8 months ago
• minotaur-toolkit / minotaur
  A description of Minotaur can be found in https://arxiv.org/abs/2306.00229.
  ☆125Updated last month
• gamozolabs / vectorized_mmu
  Snapshot of the vectorized MMU that lines up with the vectorized MMU blog
  ☆23Updated 5 years ago
• jdmccalpin / Intel_Address_Hash
  Use hardware performance counters to find mapping of addresses to L3 slices in Intel processors
  ☆17Updated 2 years ago
• dougallj / applecpu
  Apple Firestorm/Icestorm CPU microarchitecture docs
  ☆251Updated 2 years ago
• InstLatx64 / InstLatX64_Demo
  InstLatX64_Demo
  ☆45Updated 3 months ago
• larkmjc / riscv-meta
  RISC-V Instruction Set Metadata
  ☆42Updated 7 years ago
• ktran / clairvoyance
  Clairvoyance LLVM Tools. Instruction scheduling targeting long latency loads.
  ☆14Updated 6 years ago
• maerhart / llhd
  A low-level intermediate representation for hardware description languages
  ☆28Updated 5 years ago
• blitz / kernel_entry_benchmark
  Microbenchmarks for x86_64 kernel entry methods
  ☆20Updated 3 years ago
• makslevental / mmlir
  A minimal (really) out-of-tree MLIR example
  ☆46Updated 5 months ago
• obilaniu / libpfc
  A small library and kernel module for easy access to x86 performance monitor counters under Linux.
  ☆106Updated last year
• rems-project / sail-arm
  Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model
  ☆92Updated last month
• pydrofoil / pydrofoil
  A fast RISC-V emulator based on the RISC-V Sail model, and an experimental ARM one
  ☆84Updated 2 weeks ago
• llvm / eudsl
  Embedded Universal DSL: a good DSL for us, by us
  ☆66Updated this week