Alternatives and similar repositories for displayport-hardware-hacking

Users that are interested in displayport-hardware-hacking are comparing it to the libraries listed below

• azonenberg / jtaghal
  JTAG Hardware Abstraction Library
  ☆37Updated 2 years ago
• alexforencich / ftjrev
  JTAG reverse engineering software for FTDI compatible cables
  ☆54Updated 11 years ago
• ultraembedded / usb_sniffer
  High Speed USB 2.0 capture device based on miniSpartan6+
  ☆59Updated 5 years ago
• mattvenn / understanding-tinyfpga-bootloader
  understanding the tinyfpga bootloader
  ☆25Updated 7 years ago
• jevinskie / litespih4x
  SPI flash MITM and emulation (QSPI is a WIP)
  ☆20Updated 3 years ago
• alexforencich / pin-uart
  FPGA board-level debugging and reverse-engineering tool
  ☆38Updated 2 years ago
• 360nosc0pe / fpga
  360nosc0pe Siglent SDS 1x0xX-E FPGA bitstreams
  ☆17Updated 7 years ago
• tomverbeure / cisco-hwic-3g-cdma
  Reverse Engineering of the Cisco HWIC-3G-CDMA PCB
  ☆43Updated last year
• enjoy-digital / thunderscope
  LiteX based FPGA gateware for Thunderscope.
  ☆28Updated last year
• FPGAwars / toolchain-icestorm
  Icestorm, Arachne-pnr and Yosys pre-built binaries: GNU/Linux(+ARM), Windows and Mac OS
  ☆38Updated 3 years ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆30Updated 3 months ago
• semify-eda / waveform-generator
  Waveform Generator
  ☆11Updated 3 years ago
• smunaut / iua
  ice40 USB Analyzer
  ☆57Updated 5 years ago
• julbouln / dvi_lvds
  DVI to LVDS Verilog converter
  ☆25Updated 9 years ago
• gojimmypi / VerilogLanguageExtension
  Verilog Language Extension for Visual Studio
  ☆18Updated 4 years ago
• greatscottgadgets / bucatini
  a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface
  ☆31Updated 4 years ago
• mithro / tmds_encoding
  TMDS encoding tools
  ☆17Updated 7 years ago
• ultraembedded / usb2sniffer
  USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)
  ☆58Updated 5 years ago
• enjoy-digital / daisho
  Test of the USB3 IP Core from Daisho on a Xilinx device
  ☆100Updated 6 years ago
• ultraembedded / riscv_sbc
  A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
  ☆30Updated 5 years ago
• enjoy-digital / pcie_analyzer
  PCIe analyzer experiments
  ☆63Updated 5 years ago
• jevinskie / liteluna
  LiteX LUNA USB stack integration
  ☆14Updated 3 years ago
• 360nosc0pe / yocto
  360nosc0pe Yocto build environment
  ☆12Updated 7 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆52Updated 2 years ago
• 360nosc0pe / scope
  Siglent SDS1x0xX-E FPGA bitstreams
  ☆43Updated last year
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆66Updated 2 months ago
• timvideos / HDMI2USB-numato-opsis-sample-code
  Example code for the Numato Opsis board, the first HDMI2USB production board.
  ☆57Updated 7 years ago
• betrusted-io / jtag-trace
  Jtag parsing scripts
  ☆10Updated 2 years ago
• wd5gnr / verifla
  Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
  ☆34Updated 7 years ago
• xobs / netv2-fpga
  FPGA code for NeTV2
  ☆15Updated 7 years ago