Verilog-A Preisach ferroelectric cap (PFECAP) simulation model for FET
☆31Feb 16, 2020Updated 6 years ago
Alternatives and similar repositories for pfecap
Users that are interested in pfecap are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A scalable FeFET compact model☆30Apr 21, 2022Updated 4 years ago
- Verilog-A simulation models☆122Sep 19, 2026Updated last month
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆47Aug 6, 2020Updated 6 years ago
- Ferroelectric Simulation using a discrete Landau formulation on a 2D grid☆11Jun 4, 2026Updated 4 months ago
- SHUbeamer是为了帮助上海大学师生撰写演示文稿而编写的LaTex Beamer模版文件☆10Dec 1, 2021Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- MEMORY CENTRIC SYSTEMS FOR AI(CSI6207-01) Lecture at Yonsei(20-1)☆12Apr 6, 2022Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆61Dec 19, 2022Updated 3 years ago
- A new DRAM substrate that mitigates the excessive energy consumption from both (i) transmitting unused data on the memory channel and (i…☆14Aug 23, 2024Updated 2 years ago
- A comprehensive content-addressable accelerator simulation framework.☆22Apr 16, 2026Updated 6 months ago
- An open-source resistive random access memory (RRAM) compiler based on OpenRAM.☆11Nov 21, 2020Updated 5 years ago
- Physical memristor/RRAM/resistive switching device SPICE compact model, that is able to accurately fit both unipolar/bipolar devices sett…☆55Oct 31, 2019Updated 7 years ago
- ☆24Oct 21, 2026Updated last week
- This is where gem5 based DRAM cache models live.☆20Mar 23, 2023Updated 3 years ago
- The Berkeley Verilog-A Parser and Processor☆15Mar 24, 2017Updated 9 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- An innovative Verilog-A compiler☆203Aug 20, 2024Updated 2 years ago
- The ability to manipulate domains and domain walls underpins function in a range of next-generation applications of ferroelectrics. While…☆22Jul 6, 2023Updated 3 years ago
- Comprehensive numerical modeling of filamentary RRAM devices including voltage ramp-rate and cycle-to-cycle variations☆26Apr 4, 2024Updated 2 years ago
- Cookiecutter template for FastAPI + Panel projects in Python☆10Apr 18, 2022Updated 4 years ago
- North Carolina State University: ECE 745 : Project: LC3 Microcontroller Functional Verification using SystemVerilog☆11Jun 5, 2017Updated 9 years ago
- An innovative Verilog-A compiler - reloaded☆54Updated this week
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- Hardware Implementation of Sigmoid Function using verilog HDL☆16Dec 16, 2019Updated 6 years ago
- A wavetable synthesizer in Zig☆13Mar 26, 2020Updated 6 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.☆11Oct 9, 2019Updated 7 years ago
- Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security☆11May 1, 2017Updated 9 years ago
- The LATEX template for the bachelor thesis at Shanghai University☆22Apr 16, 2019Updated 7 years ago
- STM32 RFID Reader / Writer☆16May 24, 2014Updated 12 years ago
- DeviceModelingToolkit (DMT) is a Python tool targeted at helping modeling engineers extract model parameters, run circuit and TCAD simula…☆13Oct 17, 2026Updated 2 weeks ago
- KLayoutPhotonicPCells Core Library. Functionallities to extend KLayout PCells for Photonics☆10Jan 10, 2020Updated 6 years ago
- Original test vector of RISC-V Vector Extension☆14Mar 23, 2021Updated 5 years ago
- ☆10Mar 4, 2020Updated 6 years ago
- AI-native control plane for KLayout: RPC plugin, Python client, MCP bridge, and routing workflows for agent-driven layout automation.☆45Oct 11, 2026Updated 3 weeks ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- Implementation of Partially Parellel LDPC Code Decoder in Verilog☆15Jul 23, 2020Updated 6 years ago
- Python bindings for controlling MPI probe stations☆12Sep 22, 2026Updated last month
- Java library for parsing and manipulating graph representations of gate-level Verilog netlists☆15Jan 9, 2017Updated 9 years ago
- Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.☆15Dec 5, 2019Updated 6 years ago
- Pipelined 64-bit RISC-V core☆17Mar 7, 2024Updated 2 years ago
- A macrospin simulation tool for nanoparticles☆12Dec 4, 2024Updated last year
- A small and simple rv32i core written in Verilog☆19Jul 29, 2022Updated 4 years ago