Verilog-A Preisach ferroelectric cap (PFECAP) simulation model for FET
☆31Feb 16, 2020Updated 6 years ago
Alternatives and similar repositories for pfecap
Users that are interested in pfecap are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A scalable FeFET compact model☆29Apr 21, 2022Updated 4 years ago
- ☆17Nov 18, 2016Updated 9 years ago
- Verilog-A simulation models☆112Feb 24, 2026Updated 4 months ago
- ☆15Dec 15, 2021Updated 4 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network☆47Aug 6, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This is where gem5 based DRAM cache models live.☆20Mar 23, 2023Updated 3 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆26Jan 10, 2022Updated 4 years ago
- The ability to manipulate domains and domain walls underpins function in a range of next-generation applications of ferroelectrics. While…☆22Jul 6, 2023Updated 2 years ago
- Comprehensive numerical modeling of filamentary RRAM devices including voltage ramp-rate and cycle-to-cycle variations☆25Apr 4, 2024Updated 2 years ago
- Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security☆11May 1, 2017Updated 9 years ago
- STM32 RFID Reader / Writer☆16May 24, 2014Updated 12 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- Python bindings for controlling MPI probe stations☆11Jun 1, 2026Updated last month
- Original test vector of RISC-V Vector Extension☆14Mar 23, 2021Updated 5 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…☆14Jul 22, 2020Updated 5 years ago
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- North Carolina State University: ECE 745 : Project: LC3 Microcontroller Functional Verification using SystemVerilog☆11Jun 5, 2017Updated 9 years ago
- Implemented an ultrasonic sensor to measure and visualize distances on the FPGA 7-seg Display and LEDs.☆14Dec 5, 2019Updated 6 years ago
- KLayoutPhotonicPCells Core Library. Functionallities to extend KLayout PCells for Photonics☆10Jan 10, 2020Updated 6 years ago
- A wavetable synthesizer in Zig☆13Mar 26, 2020Updated 6 years ago
- magnum.af: A finite differences GPU-accelerated micromagnetic and atomistic simulation software☆14Nov 11, 2024Updated last year
- Benchmarking execution time of AlexNet CNN on FPGA and GPU. Developed AlexNet in opencl.☆11Oct 9, 2019Updated 6 years ago
- Nix flake for more up-to-date versions of EDA tools☆27Jun 15, 2026Updated 3 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- A macrospin simulation tool for nanoparticles☆12Dec 4, 2024Updated last year
- Arduino library to support S2-LP sub-1GHz transceiver☆15May 9, 2023Updated 3 years ago
- Hardware Implementation of Sigmoid Function using verilog HDL☆16Dec 16, 2019Updated 6 years ago
- OpenROAD Agent. This repository contain the model to train and testing the model using EDA Corpus dataset.☆30Jul 24, 2025Updated 11 months ago
- Pipelined 64-bit RISC-V core