Fork of Verilator with prebuilt Ubuntu binaries (https://www.veripool.org/wiki/verilator)
☆24Jun 28, 2022Updated 4 years ago
Alternatives and similar repositories for verilator
Users that are interested in verilator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 6 years ago
- A collection of notes related to RISC-V before they are processed and digested☆18Dec 19, 2017Updated 8 years ago
- ☆23Feb 22, 2020Updated 6 years ago
- A Statically-scheduled TDM Network-on-Chip for Real-Time Systems☆14May 19, 2019Updated 7 years ago
- Some notes on RISC-V☆38Jul 9, 2017Updated 9 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Verilog Ethernet components for FPGA implementation☆26Jun 26, 2023Updated 3 years ago
- ☆34Nov 4, 2018Updated 7 years ago
- openai-gym style RL benchmark for interconnection network congestion control study☆17May 12, 2022Updated 4 years ago
- The OpenRISC 1000 architectural simulator☆80Apr 27, 2025Updated last year
- Simple MIDAS Examples☆12Nov 25, 2018Updated 7 years ago
- AWS Shell for FireSim☆14Nov 13, 2024Updated last year
- Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is a…☆17Aug 21, 2024Updated 2 years ago
- Source files for SiFive's Freedom platforms☆1,148Jul 17, 2026Updated 3 months ago
- Slides of Dr Sparsh Mittal on "Computer Architecture for AI" (aka Hardware Architecture for Deep Learning) Course☆20Apr 20, 2026Updated 6 months ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- course design☆23Feb 28, 2018Updated 8 years ago
- ☆13Aug 22, 2022Updated 4 years ago
- Common RTL blocks used in SiFive's projects☆194May 13, 2022Updated 4 years ago
- PlutoSDR / WebUSB PoC☆18Apr 22, 2020Updated 6 years ago
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- A collection of slides of the SMT course I held at University of Milan in fall 2011☆10Mar 14, 2015Updated 11 years ago
- 4th RISC-V Workshop Tutorials☆13Jul 19, 2016Updated 10 years ago
- ☆13May 22, 2015Updated 11 years ago
- ☆11Jun 29, 2021Updated 5 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.☆21Oct 22, 2025Updated last year
- Unit testing for cocotb☆11Aug 6, 2023Updated 3 years ago
- ☆81Oct 16, 2026Updated 2 weeks ago
- GNU toolchain for RISC-V, including GCC☆16Apr 28, 2026Updated 6 months ago
- Custom extensions to the RISC-V isa simulator for the UCB-BAR ESP project☆17Nov 27, 2022Updated 3 years ago
- A 32-bit Microcontroller featuring a RISC-V core☆166Feb 28, 2018Updated 8 years ago
- Pre-built ROCm-GDB and GPU Debug SDK binaries☆16Mar 21, 2019Updated 7 years ago
- IEEE Std 1800™-2012: IEEE Standard for SystemVerilog -- Unified Hardware Design, Specification, and Verification Language syntax definiti…☆34Nov 6, 2024Updated last year
- SystemC UVM verification environment with Constraint Randomized stimulus, Coverage, Assertions☆21Dec 1, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Transmission of HDMI Signals over Spartan 6 - XC6SLX45 . Transmission of High-Definition Multimedia Interface (HDMI) and Digital Visual …☆13Feb 13, 2020Updated 6 years ago
- ☆111Oct 19, 2018Updated 8 years ago
- Example of Python and PyTest powered workflow for a HDL simulation☆15Jan 17, 2021Updated 5 years ago
- RADIX-4 SRT division☆13Oct 31, 2019Updated 7 years ago
- 输入wav文件,输出其简谱(较粗糙)☆10Jun 29, 2018Updated 8 years ago
- This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times …☆28Jul 4, 2019Updated 7 years ago
- ☆18Sep 2, 2020Updated 6 years ago