27-Queens Puzzle: Massively Parellel Enumeration and Solution Counting
☆93Oct 24, 2017Updated 8 years ago
Alternatives and similar repositories for q27
Users that are interested in q27 are comparing it to the libraries listed below
Sorting:
- Designing Relocatable FPGA Partitions with Vivado Design Suite☆10Apr 20, 2018Updated 7 years ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆24Jan 14, 2022Updated 4 years ago
- Tuning Assistant for Floating point to Fixed point Optimization☆19Mar 26, 2022Updated 3 years ago
- ☆15Apr 17, 2022Updated 3 years ago
- FPGA Clock Configuration Device Driver for Linux☆32Dec 4, 2025Updated 3 months ago
- ☆23Feb 23, 2016Updated 10 years ago
- ChipTools is a utility to automate FPGA build and verification☆25Oct 22, 2021Updated 4 years ago
- A C++ template library for FPGAs on top of Xilinx Vivado HLS☆14Feb 2, 2017Updated 9 years ago
- TLUT tool flow for parameterised configurations for FPGAs☆16Aug 5, 2024Updated last year
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- Hardware Design/Visualization/Simulation/RTLGeneration Framework☆16Mar 12, 2026Updated last week
- R package providing Asio C++ library header files☆14Nov 26, 2025Updated 3 months ago
- SWI-Prolog ported to WebAssembly☆40Jun 21, 2018Updated 7 years ago
- There are the documents, floating and fixed-point algorithms, and Verilog codes for the project.☆11Jun 27, 2016Updated 9 years ago
- PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.☆30Feb 23, 2026Updated 3 weeks ago
- doppioDB - A hardware accelerated database☆51May 2, 2017Updated 8 years ago
- Not Another Range Library☆39Mar 9, 2014Updated 12 years ago
- ☆10Feb 12, 2015Updated 11 years ago
- Connectal is a framework for software-driven hardware development.☆178Oct 16, 2023Updated 2 years ago
- ☆20May 8, 2012Updated 13 years ago
- Design space for LLVM/Clang work☆45Jun 14, 2012Updated 13 years ago
- Hilbert-style formal proofs for mathematics☆12Jun 25, 2018Updated 7 years ago
- Communicate asynchronously with DGT boards☆15Dec 26, 2022Updated 3 years ago
- Graphviz DOT grammar for tree-sitter.☆19Oct 21, 2025Updated 5 months ago
- 🕒 Static Timing Analysis diagram renderer☆13Dec 13, 2023Updated 2 years ago
- ☆14Jan 12, 2023Updated 3 years ago
- Object Notation for Markup Language☆23Jan 6, 2023Updated 3 years ago
- Chisel Fixed-Point Arithmetic Library☆18Dec 15, 2025Updated 3 months ago
- Open source fpga project leveraging vtr CAD flow.☆26Mar 4, 2023Updated 3 years ago
- ☆20Jun 12, 2024Updated last year
- Base code and optimized code for the benchmarks used in the PolyMage paper published at ASPLOS 2015☆20Jun 14, 2016Updated 9 years ago
- IP-XACT XML binding library☆16Jun 23, 2016Updated 9 years ago
- Identifying the compiler family, version and compiler flags that generated a binary☆19Dec 19, 2019Updated 6 years ago
- Fast packet processing using CPUs☆39Jan 23, 2017Updated 9 years ago
- ASIO Cooperative Task for await-based coroutine☆16Sep 8, 2018Updated 7 years ago
- Presentation materials for the 2016 Berkeley C++ Summit☆14Oct 20, 2016Updated 9 years ago
- REAPR (Reconfigurable Engine for Automata Processing) is a general-purpose framework for accelerating automata processing applications su…☆16Jun 29, 2019Updated 6 years ago
- Solutions to the Google foobar challenges made to me☆12Jun 6, 2022Updated 3 years ago
- Reference material for libbeauty☆25Aug 6, 2022Updated 3 years ago