sumith1896 / tusSATLinks
A SAT solver implementation in VHDL, team tussle
☆20Updated 9 years ago
Alternatives and similar repositories for tusSAT
Users that are interested in tusSAT are comparing it to the libraries listed below
Sorting:
- firrtlator is a FIRRTL C++ library☆21Updated 8 years ago
- An executable specification of the RISCV ISA in L3.☆42Updated 6 years ago
- GNU Superoptimizer Version 2☆26Updated 4 years ago
- A research platform and active library for generalised SAT solving☆32Updated last month
- An advanced automated reasoning tool for memory consistency model specifications.☆22Updated 3 years ago
- Liveness-driven random C code generator☆41Updated last year
- The BERI and CHERI processor and hardware platform☆49Updated 8 years ago
- soap - Structural Optimisation of Arithmetic Programs☆23Updated 9 years ago
- llvm opt fuzzer and bounded exhaustive test generator☆40Updated 2 years ago
- ☆19Updated 10 years ago
- A toy code generator (i.e. "program synthesis") using the Z3 solver☆35Updated 7 years ago
- Iodine: Verifying Constant-Time Execution of Hardware☆13Updated 4 years ago
- A minimalistic and high-performance SAT solver☆28Updated 2 years ago
- Rigorous Floating-Point Mixed-Precision Tuner☆14Updated 5 years ago
- Automatic inference of a formal specification of the x86_64 instruction set☆70Updated 9 years ago
- custom type systems for Clang☆98Updated 9 years ago
- A Verilog parser for Haskell.☆35Updated 4 years ago
- The Diderot language compiler☆15Updated 2 years ago
- Source code for the equivalence checker presented in the PLDI 2019 paper, "Semantic Program Alignment for Equivalence Checking"☆43Updated 5 years ago
- The GNU Superoptimizer☆26Updated 10 years ago
- "CF3" is a C compiler test suite targeting arithmetic optimization.☆37Updated 8 years ago
- ☆88Updated 3 years ago
- Lower Size Bounds for Sorting Networks☆46Updated 4 years ago
- Alive (Automated LLVM's InstCombine Verifier) with automated reasoning for both integer and floating point peephole optimizations in LLVM☆32Updated 6 years ago
- CCG is a random C Code Generator☆44Updated 2 years ago
- A low-level intermediate representation for hardware description languages☆28Updated 5 years ago
- Tools from Pugh et al.'s "Omega Project" for constraint-based compiler tools: The "Omega Library" for constraint manipulation; The "Omega…☆71Updated 3 years ago
- Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…☆56Updated 4 years ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆80Updated 2 weeks ago
- ☆28Updated 3 months ago