sumith1896 / tusSATLinks
A SAT solver implementation in VHDL, team tussle
☆21Updated 9 years ago
Alternatives and similar repositories for tusSAT
Users that are interested in tusSAT are comparing it to the libraries listed below
Sorting:
- An advanced automated reasoning tool for memory consistency model specifications.☆25Updated 4 years ago
- ☆19Updated 10 years ago
- Liveness-driven random C code generator☆42Updated 4 months ago
- An executable specification of the RISCV ISA in L3.☆42Updated 6 years ago
- A minimalistic and high-performance SAT solver☆28Updated 2 years ago
- The BERI and CHERI processor and hardware platform☆50Updated 8 years ago
- Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…☆56Updated 5 years ago
- firrtlator is a FIRRTL C++ library☆23Updated 8 years ago
- Source code for the equivalence checker presented in the PLDI 2019 paper, "Semantic Program Alignment for Equivalence Checking"☆45Updated 5 years ago
- A research platform and active library for generalised SAT solving☆33Updated 6 months ago
- custom type systems for Clang☆96Updated 10 years ago
- Tools from Pugh et al.'s "Omega Project" for constraint-based compiler tools: The "Omega Library" for constraint manipulation; The "Omega…☆72Updated 4 years ago
- llvm opt fuzzer and bounded exhaustive test generator☆47Updated 3 years ago
- Automatic inference of a formal specification of the x86_64 instruction set☆71Updated 9 years ago
- ☆90Updated 3 years ago
- Automatic regression verification for LLVM programs☆19Updated 4 years ago
- An experimental System-on-Chip with a custom compiler toolchain.☆60Updated 5 years ago
- GNU Superoptimizer Version 2☆26Updated 4 years ago
- SAT instance generator for SHA-1☆49Updated 4 years ago
- ☆52Updated 9 years ago
- A model checker based on SAT solving and induction☆15Updated 10 years ago
- Test and benchmark repository for Z3.☆28Updated 2 weeks ago
- Alive (Automated LLVM's InstCombine Verifier) with automated reasoning for both integer and floating point peephole optimizations in LLVM☆33Updated 6 years ago
- Solving floating point SMT constraints on a GPU☆49Updated 4 years ago
- extensible interpreter for LLVM dynamic analyses☆45Updated 12 years ago
- Sail version of Arm ISA definition, currently for Armv9.3-A, and with the previous Sail Armv8.5-A model☆89Updated 2 weeks ago
- An implementation of a SAT solver using the CUDA library☆15Updated 7 years ago
- AST - Extractor for LLVM☆18Updated 4 years ago
- Fuzz testing for Dafny☆13Updated 3 years ago
- Nsolv - A front-end that allows multiple SMTLIBv2 compliant solvers to executed in parallel.☆12Updated 13 years ago