Alternatives and similar repositories for riscv-atomics:

Users that are interested in riscv-atomics are comparing it to the libraries listed below

• hanhwi / SimPoint
  ☆12Updated 2 years ago
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆25Updated 5 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆41Updated last year
• ueqri / vis4mesh
  Visualization tool for designing mesh Network-on-Chips (NoC) and assisting with architecture research
  ☆11Updated last year
• sophgocommunity / SG2042-Newsletter
  Weekly update for SG2042 ecosystem. RISC-V is inevitable!
  ☆22Updated last week
• spcl / pspin
  PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing
  ☆101Updated 2 years ago
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆34Updated 11 months ago
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆42Updated last year
• afborchert / pointer-chasing
  Utilities to measure read access times of caches, memory, and hardware prefetches for simple and fused operations
  ☆82Updated last year
• jiegec / cpu-micro-benchmarks
  CPU micro benchmarks
  ☆55Updated this week
• riscv-admin / riscv-ovpsim
  ☆61Updated 4 years ago
• riscv / virtual-memory
  ☆36Updated 3 years ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated last year
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆110Updated last month
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆62Updated 2 years ago
• AlessandroCilardo / NaplesPU
  The official NaplesPU hardware code repository
  ☆15Updated 5 years ago
• PrincetonUniversity / maple
  MAPLE's hardware-software co-design allows programs to perform long-latency memory accesses asynchronously from the core, avoiding pipeli…
  ☆21Updated last year
• riscv-boom / fpga-zynq
  Support for Rocket Chip on Zynq FPGAs
  ☆40Updated 6 years ago
• riscv / riscv-bfloat16
  ☆34Updated 9 months ago
• camel-cdr / rvv-bench-results
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)
  ☆31Updated last week
• jiegec / cpu
  Microarchitecture diagrams of several CPUs
  ☆32Updated last month
• rivosinc / veclibm
  Vector math library using RISC-V vector ISA via C intrinsic
  ☆17Updated 5 months ago
• firesim / FireMarshal
  Software workload management tool for RISC-V based SoC research. This is the default workload management tool for Chipyard and FireSim.
  ☆80Updated 4 months ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆39Updated last year
• zhemao / riscv-dma3
  The 3rd Iteration of the Berkeley RISC-V DMA Accelerator
  ☆26Updated 5 years ago
• carrv / carrv.github.io
  Workshop on Computer Architecture Research with RISC-V (CARRV)
  ☆39Updated 5 months ago
• gem5bootcamp / gem5-bootcamp-env
  The gem5 Bootcamp 2022 environment. Archived.
  ☆36Updated 9 months ago
• pcie-bench / pciebench-netfpga
  pcie-bench code for NetFPGA/VCU709 cards
  ☆35Updated 6 years ago
• Xilinx / nanotube
  ☆103Updated 2 years ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆40Updated last week