sophgocommunity / SG2042-Newsletter
Weekly update for SG2042 ecosystem. RISC-V is inevitable!
☆22Updated last week
Alternatives and similar repositories for SG2042-Newsletter:
Users that are interested in SG2042-Newsletter are comparing it to the libraries listed below
- ☆29Updated 2 months ago
- ☆29Updated 2 years ago
- GNU toolchain for Xuantie RISC-V CPU, including GCC and Binutils ……☆98Updated 3 weeks ago
- Dual-issue RV64IM processor for fun & learning☆60Updated last year
- The ISA specification for the ZiCondOps extension.☆19Updated last year
- ☆30Updated 5 months ago
- A gdbstub for connecting GDB to a RISC-V Debug Module☆28Updated 7 months ago
- ☆42Updated 3 years ago
- A bare-metal application to test specific features of the risc-v hypervisor extension☆39Updated last year
- Translate RISC-V Vector Assembly from v1.0 to v0.7☆33Updated 8 months ago
- RISC-V Configuration Structure☆38Updated 6 months ago
- A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)☆31Updated this week
- Documentation of the RISC-V C API☆76Updated 2 months ago
- ☆35Updated 9 months ago
- A extremely size-optimized RV32I soft processor for FPGA.☆27Updated 6 years ago
- ☆89Updated last month
- ☆29Updated last month
- Proposal for new Embedded ABI (EABI) for use in embedded RISC-V systems.☆27Updated 3 years ago
- Trivial RISC-V Linux binary bootloader☆50Updated 4 years ago
- Following the RISC-V IME extension standard, and reusing Vector register resources, these instructions can bring more than a tenfold perf…☆57Updated 8 months ago
- AIA IP compliant with the RISC-V AIA spec☆40Updated 3 months ago
- RISC-V Nexus Trace TG documentation and reference code☆50Updated 4 months ago
- RTL blocks compatible with the Rocket Chip Generator☆16Updated last month
- Instruction set simulator for RISC-V, MIPS and ARM-v6m☆97Updated 3 years ago
- ☆31Updated last week
- Synthesisable SIMT-style RISC-V GPGPU☆33Updated last month
- ☆61Updated 4 years ago
- ✔️ Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.☆33Updated this week
- ☆11Updated 4 years ago
- Biweekly Sync Meeting for RISC-V Software Ecosystem. Meeting time is more friendly for people living in East Asia.☆23Updated last month