Alternatives and similar repositories for busybear-linux

Users that are interested in busybear-linux are comparing it to the libraries listed below

• riscvarchive / riscv-platform-specs
  RISC-V Profiles and Platform Specification
  ☆114Updated last year
• michaeljclark / riscv-probe
  Simple machine mode program to probe RISC-V control and status registers
  ☆123Updated 2 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated 3 weeks ago
• kvm-riscv / howto
  KVM RISC-V HowTOs
  ☆47Updated 3 years ago
• riscv / riscv-CMOs
  ☆89Updated 3 years ago
• riscv / riscv-aia
  ☆92Updated 3 weeks ago
• ultraembedded / riscv-linux-boot
  Trivial RISC-V Linux binary bootloader
  ☆51Updated 4 years ago
• sifiveinc / meta-sifive
  SiFive OpenEmbedded / Yocto BSP Layer
  ☆53Updated last month
• riscv-non-isa / riscv-device-tree-doc
  RISC-V Specific Device Tree Documentation
  ☆42Updated last year
• riscvarchive / riscv-newlib
  RISC-V port of newlib
  ☆100Updated 3 years ago
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆93Updated 5 years ago
• riscvarchive / riscv-binutils-gdb
  RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
  ☆149Updated 3 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆99Updated 3 years ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆145Updated 2 weeks ago
• westerndigitalcorporation / RISC-V-Linux
  This repository provides a Linux kernel bootable on RISC-V boards from SiFive
  ☆169Updated 5 years ago
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆153Updated last week
• riscv-admin / riscv-ovpsim
  ☆62Updated 4 years ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆41Updated 9 months ago
• hex-five / multizone-sdk
  MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn'…
  ☆86Updated last year
• michaeljclark / musl-riscv-toolchain
  riscv-linux musl gcc toolchain bootstrap scripts
  ☆17Updated 4 years ago
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆155Updated 3 years ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆101Updated 3 years ago
• starfive-tech / JH7100_Docs
  ☆62Updated 4 years ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆40Updated last year
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆163Updated 6 months ago
• openrisc / or1ksim
  The OpenRISC 1000 architectural simulator
  ☆76Updated 3 months ago
• riscv-non-isa / riscv-semihosting
  ☆31Updated 2 weeks ago
• riscv / riscv-test-env
  ☆49Updated 3 months ago
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆192Updated 2 weeks ago
• riscvarchive / risc-v-getting-started-guide
  The official RISC-V getting started guide
  ☆202Updated last year