Alternatives and similar repositories for PCBpy:

Users that are interested in PCBpy are comparing it to the libraries listed below

• mvsoliveira / IBERTpy
  A Python package for running IBERT Eye scan in Vivado, ploting eye diagrams with mathplotlib and compiling results with LaTeX
  ☆13Updated 3 years ago
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆17Updated 4 years ago
• hdl-util / mipi-ccs
  Control a MIPI Camera over I2C
  ☆21Updated 4 years ago
• dawsonjon / Chips-Demo
  Chips 2.0 Demo for Atlys Spartan 6 development platform. Web app using C to Verilog TCP/IP server.
  ☆15Updated 7 years ago
• siorpaes / SimpleSoC
  Very simple Cortex-M1 SoC design based on ARM DesignStart
  ☆17Updated 3 years ago
• andrewattwood / fuserisc
  Dual RISC-V DISC with integrated eFPGA
  ☆16Updated 3 years ago
• linuxbest / ahci_mpi
  an sata controller using smallest resource.
  ☆15Updated 11 years ago
• Stanlazy / ZYNQ_Ruler
  Yet Another XC7Z010 Board
  ☆17Updated 3 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆41Updated 2 months ago
• westonb / open-pmic
  A current mode buck converter on the SKY130 PDK
  ☆27Updated 3 years ago
• ultraembedded / core_ulpi_wrapper
  ULPI Link Wrapper (USB Phy Interface)
  ☆25Updated 4 years ago
• ymz000 / Kintex-7-xc7k325-pcb
  基于Kintex-7 XC7K325T的高性能FPGA功能验证板
  ☆19Updated 5 years ago
• freecores / turbo8051
  turbo 8051
  ☆29Updated 7 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆56Updated last month
• myriadrf / LimeSDR-PCIe_GW
  Altera Cyclone IV FPGA project for the PCIe LimeSDR board
  ☆38Updated 2 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆59Updated last year
• jsyk / miilink
  Connecting FPGA and MCU using Ethernet RMII
  ☆23Updated 9 years ago
• oscimp / fpga_ip
  OscillatorIMP ecosystem FPGA IP sources
  ☆27Updated this week
• Stanlazy / 7z010_ddr
  4-Layer XC7Z010 DDR3 Layout
  ☆15Updated 3 years ago
• stnolting / cjtag_bridge
  🔌 Compact JTAG ("cJTAG") to 4-wire JTAG (IEEE 1149.1) bridge.
  ☆23Updated 3 years ago
• freecores / usb_phy
  USB 1.1 PHY
  ☆10Updated 10 years ago
• freecores / wdsp
  DSP WishBone Compatible Cores
  ☆13Updated 10 years ago
• hkhajanchi / fpga-pid
  Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA
  ☆30Updated 4 years ago
• yrrapt / caravel_amsat_txrx_ic
  ☆30Updated 4 years ago
• aomtoku / hdmi-ts
  hdmi-ts Project
  ☆13Updated 7 years ago
• ultraembedded / core_usb_uart
  USB serial device (CDC-ACM)
  ☆38Updated 4 years ago
• ultraembedded / core_usb_fs_phy
  USB Full Speed PHY
  ☆42Updated 4 years ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• tgingold / OpenTDC
  Time to Digital Converter (TDC)
  ☆30Updated 4 years ago
• ultraembedded / core_enet
  Ethernet MAC 10/100 Mbps
  ☆25Updated 3 years ago