Alternatives and similar repositories for hd_dvs:

Users that are interested in hd_dvs are comparing it to the libraries listed below

• pulp-platform / sne
  ☆17Updated 2 years ago
• Cornell-RelaxML / Hyperdimensional-Computing
  Official implementation for the paper "Understanding Hyperdimensional Computing for Parallel Single-Pass Learning"
  ☆18Updated last year
• Intelligent-Computing-Lab-Yale / SpikeSim
  ☆32Updated last year
• open-neuromorphic / fpga-snntorch
  Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.
  ☆39Updated 10 months ago
• imshaaz21 / Spiking-Neural-Network-on-FPGA
  CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL
  ☆11Updated last year
• coreylammie / TCAS-STDP
  IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures
  ☆24Updated 5 years ago
• weierwan / Neurram_48core
  Verilog and Python drivers and APIs for Neurram 48-core chip
  ☆32Updated 2 years ago
• abbas-rahimi / HDC-Language-Recognition
  Hyperdimensional computing for language recognition: Matlab and RTL implementations
  ☆32Updated 7 years ago
• DanielGerlinghoff / radix-encoding
  Framework for radix encoded SNN on FPGA
  ☆13Updated 3 years ago
• Intelligent-Computing-Lab-Yale / SEENN
  Pytorch implementation of SEENN (Spiking Early Exit Neural Networks) (NeurIPS 2023)
  ☆12Updated 2 months ago
• neurosim / NeuroSim
  ☆20Updated 2 weeks ago
• SLAM-Lab / SANA-FE
  Simulation of Advanced Neuromorphic Architectures for Fast Exploration
  ☆11Updated 2 months ago
• joksas / nonideality-aware-mnn-training
  Code used in the paper “Nonideality-Aware Training for Accurate and Robust Low-Power Memristive Neural Networks”
  ☆12Updated last year
• elliothe / N3H_Core
  [FPGA-2022] N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores
  ☆12Updated 3 years ago
• NeuroBench / neurobench
  Benchmark harness and baseline results for the NeuroBench algorithm track.
  ☆66Updated this week
• RuokaiYin / MINT_Quantization
  MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award
  ☆11Updated 9 months ago
• dnvtmf / TBN
  TBNv2: Convolutional Neural Network With Ternary Inputs and Binary Weights
  ☆17Updated 4 years ago
• AlexMontgomerie / fpgaconvnet-hls
  ☆27Updated 2 months ago
• os-hxfan / BayesNN_FPGA
  FPGA-based hardware acceleration for dropout-based Bayesian Neural Networks.
  ☆22Updated last year
• MXHX7199 / SNN-SSTDP
  SSTDP is a efficient spiking neural network training framework, which is contributed by Fangxin Liu and Wenbo Zhao.
  ☆34Updated 3 years ago
• jeshraghian / QSNNs
  Quantization-aware training with spiking neural networks
  ☆38Updated 2 years ago
• shieldforever / NeuronQuant
  [ASP-DAC 2025] "NeuronQuant: Accurate and Efficient Post-Training Quantization for Spiking Neural Networks" Official Implementation
  ☆9Updated 3 months ago
• sfmth / OpenSpike
  Fully opensource spiking neural network accelerator
  ☆133Updated last year
• ChFrenkel / ReckOn
  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
  ☆78Updated 2 years ago
• jeshraghian / ESSCIRC23-os-neuromorphic-tutorial
  Notebooks for Hardware-Aware Training of Spiking Neural Networks. Open-Source Neuromorphic Circuit Design Tutorial at ESSCIRC 2023.
  ☆20Updated last year
• gicLAB / SECDA
  ☆18Updated 2 years ago
• EEESlab / combinational-bnn
  System Verilog code describing a fully combinational binarized neural network.
  ☆33Updated 6 years ago
• e-dupuis / awesome-approximate-dnn
  Curated content for DNN approximation, acceleration ... with a focus on hardware accelerator and deployment
  ☆24Updated 8 months ago
• ic-lab-duth / FusedGCN4HLS
  Systolic Three Matrix Multiplier for Graph Convolutional Networks using High Level Synthesis
  ☆22Updated 2 years ago
• sjduan / LeHDC
  ☆10Updated 7 months ago