Open-source NPU (Neural Processing Unit) for LLM inference - runs GPT-2, LLaMA, Mistral, Qwen2
☆12Mar 15, 2026Updated 7 months ago
Alternatives and similar repositories for tiny-npu
Users that are interested in tiny-npu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- OBI SystemVerilog synthesizable interconnect IPs for on-chip communication☆26Sep 10, 2026Updated last month
- HB-NPU simulator runs the HB-DRAM PNM accelerator, HB-NPU, based on DRAMsim3 open source DRAM simulator.☆13Updated this week
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- Silicon-proven INT8 systolic NPU (8×8 MAC array) taped out on SkyWater 130nm via LibreLane. Features a custom 32-bit ISA, UART–APB host i…☆20May 24, 2026Updated 5 months ago
- Tensor Processing Unit implementation in Verilog☆16Aug 12, 2026Updated 2 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- SJTU MST3314 course project (CNN). A binary classification convolutional neural network in Verilog.☆15Mar 8, 2026Updated 7 months ago
- ☆32Jul 30, 2025Updated last year
- ☆13May 26, 2025Updated last year
- An HBM FPGA based SpMV Accelerator☆19Aug 29, 2024Updated 2 years ago
- RISC-V SIMD Superscalar Dual-Issue Processor☆31Apr 24, 2025Updated last year
- A cache simulator in python☆26Sep 8, 2017Updated 9 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 3 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- End-to-End NPU: RTL systolic array → AXI4 SoC → TVM compiler → FPGA inference☆62Jul 29, 2026Updated 2 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- 4th RISC-V Workshop Tutorials☆13Jul 19, 2016Updated 10 years ago
- jyy os enhanced☆13Jul 10, 2025Updated last year
- Two Level Cache Controller implementation in Verilog HDL☆69Jul 9, 2020Updated 6 years ago
- ☆22Jul 1, 2024Updated 2 years ago
- Example of clingo usage on website as a client-side JS program☆14Aug 27, 2019Updated 7 years ago
- A High performance and tiny TVM graph executor library written in C which can compile to WebAssembly and use CUDA/WebGPU as the accelerat…☆13Aug 3, 2023Updated 3 years ago
- An SFZ format parser☆14May 22, 2024Updated 2 years ago
- MacBook 自用软件破解(macOS Intel)☆13Jun 9, 2023Updated 3 years ago
- IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system☆22Aug 19, 2026Updated 2 months ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- ☆24Sep 26, 2025Updated last year
- Hardware Acceleration of Neural Networks for Event Camera-Based Object Detection on SoC FPGAs☆26Sep 16, 2026Updated last month
- UVM Testbench for synchronus fifo☆21Aug 28, 2020Updated 6 years ago
- Simple converter of MuseScore 2 plugins to MuseScore 3☆15Mar 30, 2019Updated 7 years ago
- AHB-lite, AHB-APB bridge and extended APB side architecture in SystemVerilog☆21Sep 2, 2023Updated 3 years ago
- A hardware accelerator for General Matrix Multiply, developed in SystemC using ESP.☆21May 26, 2021Updated 5 years ago
- ☆46Oct 21, 2025Updated last year
- A deep learning training framework in MoonBit with tape-based autograd, a PyTorch-like API, and tagless final backends for CPU/GPU. Accel…☆16May 19, 2026Updated 5 months ago
- risc-v-myth-workshop-august-Redbeard358 created by GitHub Classroom☆19Sep 15, 2020Updated 6 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- IHP 130nm ASIC tapeout of a 2x2 bfloat16 matrix matrix multiplication with DFT infrastructure. Iteration on the previous accelerator tape…☆45Jul 10, 2026Updated 3 months ago
- Enemy UAV Detection with TensorFlow Lite Micro in LoRa mesh network☆13Nov 11, 2025Updated 11 months ago
- ☆10Jan 24, 2025Updated last year
- 基于STM32F407实现2023年电赛H题,使用到的模块有SI5351时钟模块,两块AD9833,一块AD630,增益偏置调整电路若干☆13Jan 17, 2025Updated last year
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆57Oct 20, 2026Updated last week
- Python写的植物大战僵尸小游戏☆13Aug 20, 2021Updated 5 years ago
- opensource NPU for LLM inference (this run gpt2)☆286Feb 16, 2026Updated 8 months ago