hipacc / hipacc-fpgaLinks
Fork of Hipacc generating code for Vivado HLS and Altera OpenCL
☆24Updated 6 years ago
Alternatives and similar repositories for hipacc-fpga
Users that are interested in hipacc-fpga are comparing it to the libraries listed below
Sorting:
- HLS branch of Halide☆77Updated 7 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- ☆88Updated 2 years ago
- Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs☆166Updated last year
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated 2 years ago
- ☆86Updated last year
- A DSL for Systolic Arrays☆80Updated 6 years ago
- ☆30Updated 6 years ago
- DASS HLS Compiler☆29Updated last year
- ☆81Updated 6 months ago
- Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)☆60Updated 3 years ago
- ☆28Updated 7 years ago
- [FPGA 2021, Best Paper Award] An automated floorplanning and pipelining tool for Vivado HLS.☆122Updated 2 years ago
- Benchmarks for Accelerator Design and Customized Architectures☆128Updated 5 years ago
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆54Updated 5 years ago
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆64Updated 3 years ago
- ☆58Updated 5 years ago
- ☆46Updated last year
- Spector: An OpenCL FPGA Benchmark Suite☆48Updated 6 years ago
- CGRA Compilation Framework☆84Updated 2 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆51Updated 6 years ago
- A pre-RTL, power-performance model for fixed-function accelerators☆177Updated last year
- ☆72Updated 2 years ago
- ☆58Updated 2 years ago
- MAERI public release☆31Updated 3 years ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆77Updated 6 years ago
- ☆59Updated this week
- A hardware synthesis framework with multi-level paradigm☆40Updated 6 months ago
- Train and deploy LUT-based neural networks on FPGAs☆97Updated last year
- ☆15Updated 2 years ago