Alternatives and similar repositories for hipacc-fpga

Users that are interested in hipacc-fpga are comparing it to the libraries listed below

• fpga-opencl-benchmarks / rodinia_fpga
  Rodinia Benchmark Suite for OpenCL-based FPGAs
  ☆31Updated 2 years ago
• jingpu / Halide-HLS
  HLS branch of Halide
  ☆76Updated 6 years ago
• Xilinx / gemx
  Matrix Operation Library for FPGA https://xilinx.github.io/gemx/
  ☆63Updated 5 years ago
• KastnerRG / spector
  Spector: An OpenCL FPGA Benchmark Suite
  ☆47Updated 6 years ago
• intel / rapid-design-methods-for-developing-hardware-accelerators
  ☆87Updated 2 years ago
• template-hls / template-hls-float
  ☆29Updated 6 years ago
• sld-columbia / hl5
  A 32-bit RISC-V Processor Designed with High-Level Synthesis
  ☆52Updated 5 years ago
• Xilinx / SDSoC_Examples
  ☆84Updated 4 years ago
• ucb-bar / hwacha-template
  Template for projects using the Hwacha data-parallel accelerator
  ☆34Updated 4 years ago
• tukl-msd / LSTM-PYNQ
  ☆29Updated 7 years ago
• StanfordAHA / Halide-to-Hardware_archive
  ☆81Updated 3 months ago
• cornell-zhang / facedetect-fpga
  ☆46Updated 5 years ago
• cornell-zhang / rosetta
  Rosetta: A Realistic High-level Synthesis Benchmark Suite for Software Programmable FPGAs
  ☆164Updated last year
• zhemao / chisel-float
  Floating point modules for CHISEL
  ☆32Updated 10 years ago
• scale-lab / la-core
  Linear algebra accelerators for RISC-V (published in ICCD 17)
  ☆66Updated 7 years ago
• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆20Updated 7 years ago
• lana555 / dynamatic
  ☆86Updated last year
• Licheng-Guo / vivado-hls-broadcast-optimization
  [DAC 2020] Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
  ☆32Updated 4 years ago
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆79Updated 6 years ago
• maeri-project / MAERI_bsv_isca2018
  MAERI public release
  ☆31Updated 3 years ago
• PrincetonUniversity / IMDb-Archive
  ILA Model Database
  ☆22Updated 4 years ago
• awai54st / LUTNet
  ☆57Updated 5 years ago
• wincle626 / HLS_Legup
  ☆27Updated 7 years ago
• dillonhuff / clockwork
  A polyhedral compiler for hardware accelerators
  ☆56Updated 9 months ago
• zslwyuan / Light-HLS
  Fast, Accurate and Convenient Light-Weight HLS Framework for Academic Design Space Exploration and Evaluation. (LLVM-11)
  ☆60Updated 3 years ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 3 years ago
• pku-liang / Hector
  A hardware synthesis framework with multi-level paradigm
  ☆38Updated 4 months ago
• sfu-arch / muir
  ☆24Updated 4 years ago
• etherzhhb / Shang
  The Shang high-level synthesis framework
  ☆119Updated 10 years ago
• jianyicheng / DSS
  DASS HLS Compiler
  ☆29Updated last year