kenter / OpenCL-FPGA-examples
☆19Updated 6 years ago
Alternatives and similar repositories for OpenCL-FPGA-examples:
Users that are interested in OpenCL-FPGA-examples are comparing it to the libraries listed below
- Rodinia Benchmark Suite for OpenCL-based FPGAs☆31Updated last year
- ☆81Updated last month
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 4 years ago
- ⛔ DEPRECATED ⛔ HERO Software Development Kit☆20Updated 3 years ago
- Learn NVDLA by SOMNIA☆33Updated 5 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆51Updated 4 years ago
- ☆85Updated 2 years ago
- HLS branch of Halide☆77Updated 6 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 4 years ago
- Lake is a framework for generating synthesizable memory modules from a high-level behavioral specification and widely-available memory ma…☆21Updated this week
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- Support for Rocket Chip on Zynq FPGAs☆40Updated 5 years ago
- ☆91Updated last year
- A DSL for Systolic Arrays☆78Updated 6 years ago
- a clone of POCL that includes RISC-V newlib devices support and Vortex☆40Updated 2 weeks ago
- Fork of Hipacc generating code for Vivado HLS and Altera OpenCL☆24Updated 6 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆19Updated 7 years ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆22Updated 4 years ago
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆97Updated last year
- Custom BLAS and LAPACK Cross-Compilation Framework for RISC-V☆19Updated 4 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆34Updated 5 years ago
- Polyhedral High-Level Synthesis in MLIR☆30Updated 2 years ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆16Updated 3 years ago
- Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…☆101Updated last year
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- Repository for the tools and non-commercial data used for the "Accelerator wall" paper.☆49Updated 6 years ago
- Alveo Collective Communication Library: MPI-like communication operations for Xilinx Alveo accelerators☆87Updated last week
- ☆40Updated 5 years ago
- Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)☆61Updated 2 years ago