Alternatives and similar repositories for twitchcore

Users that are interested in twitchcore are comparing it to the libraries listed below

• geohot / edgetpuxray
  Enabling tinygrad compatibility with the Google Edge TPU
  ☆85Updated last year
• rsd-devel / rsd
  RSD: RISC-V Out-of-Order Superscalar Processor
  ☆1,132Updated last month
• UCSBarchlab / OpenTPU
  A open source reimplementation of Google's Tensor Processing Unit (TPU).
  ☆712Updated 8 years ago
• litex-hub / linux-on-litex-rocket
  Run 64-bit Linux on LiteX + RocketChip
  ☆207Updated 2 months ago
• MoonbaseOtago / vroom
  VRoom! RISC-V CPU
  ☆514Updated last year
• gsmecher / minimax
  Minimax: a Compressed-First, Microcoded RISC-V CPU
  ☆222Updated last year
• google / CFU-Playground
  Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrol…
  ☆537Updated 8 months ago
• johnwinans / rvalp
  RISC-V Assembly Language Programming
  ☆241Updated last year
• openhwgroup / cvw
  CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…
  ☆450Updated last week
• drom / awesome-riscv
  😎 A curated list of awesome RISC-V implementations
  ☆139Updated 2 years ago
• hughperkins / VeriGPU
  OpenSource GPU, in Verilog, loosely based on RISC-V ISA
  ☆1,134Updated last year
• tensil-ai / tensil
  Open source machine learning accelerators
  ☆392Updated last year
• bluespec / Flute
  RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
  ☆374Updated 2 years ago
• pulp-platform / mempool
  A scalable 256/1024-RISC-V-core system with low-latency access into shared L1 memory.
  ☆312Updated this week
• jameslzhu / riscv-card
  An unofficial assembly reference for RISC-V.
  ☆514Updated last year
• siliconcompiler / siliconcompiler
  Modular hardware build system
  ☆1,109Updated this week
• riscvarchive / educational-materials
  Educational materials for RISC-V
  ☆225Updated 4 years ago
• PeterAaser / RISCV-FiveStage
  Marginally better than redstone
  ☆102Updated 5 years ago
• mosscomp / moss
  A computer for human beings.
  ☆48Updated last year
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆199Updated last week
• black-parrot / black-parrot
  A Linux-capable RISC-V multicore for and by the world
  ☆748Updated last month
• PrincetonUniversity / openpiton
  The OpenPiton Platform
  ☆746Updated 2 months ago
• nickmqb / fpga_craft
  A voxel game/Minecraft clone for the iCE40 UP5K FPGA
  ☆209Updated last month
• eevaain / tiny-tpu-old
  A minimal Tensor Processing Unit (TPU) inspired by Google's TPUv1.
  ☆189Updated last year
• Domipheus / RPU
  Basic RISC-V CPU implementation in VHDL.
  ☆171Updated 5 years ago
• JulianKemmerer / PipelineC
  A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler …
  ☆689Updated last week
• nickmqb / wyre
  Hardware definition language that compiles to Verilog
  ☆106Updated 4 years ago
• andrescv / jupiter
  RISC-V Assembler and Runtime Simulator
  ☆436Updated last year
• stevehoover / LF-Building-a-RISC-V-CPU-Core
  ☆431Updated 9 months ago
• calyxir / calyx
  Intermediate Language (IL) for Hardware Accelerator Generators
  ☆565Updated last week