Alternatives and similar repositories for terminus:

Users that are interested in terminus are comparing it to the libraries listed below

• nbdd0121 / r2vm
  Rust RISC-V Virtual Machine
  ☆91Updated 2 months ago
• siriusdemon / Rare
  Build your own Riscv Emulator in Rust.
  ☆106Updated 2 years ago
• riscv-rust / k210-hal
  Rust's hardware abstract layer (HAL) for K210 chip, a dual RV64GC SoC with hardware accelerated AI peripherals. Contributions welcomed!
  ☆67Updated last year
• rustsbi / slides
  All public report slides, articles and meeting minutes related to RustSBI
  ☆28Updated this week
• KuangjuX / hypocaust
  hypocaust, a S-mode trap and emulate type-1 hypervisor run on RISC-V machine.
  ☆46Updated last year
• riscv-software-src / riscof
  ☆70Updated 3 months ago
• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆98Updated 6 months ago
• rustsbi / xuantie
  Low level access to T-Head Xuantie RISC-V processors
  ☆33Updated last month
• rustsbi / sbi-rt
  Simple RISC-V SBI runtime library; designated for supervisor use
  ☆22Updated last year
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆30Updated 2 years ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆137Updated last year
• rustsbi / awesome-rustsbi
  A curated list of awesome things related to rustsbi
  ☆39Updated 2 years ago
• xiyurain / UltraOS
  A Rust based Multicore OS developed by UltraTeam, HITsz. Currently updated on https://gitee.com/LoanCold/ultraos_backup
  ☆45Updated 8 months ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆74Updated 2 weeks ago
• rcore-os / RVM
  Rcore Virtual Machine
  ☆110Updated 10 months ago
• luojia65 / DailySchedule
  ☆23Updated 3 years ago
• ysyx-org / jemu-decoder
  The decoder library for jemu execution and web documentation
  ☆54Updated last year
• rcore-os / rcore-user
  User programs for rCore OS
  ☆18Updated 2 years ago
• rustsbi / rustsbi-hifive-unmatched
  RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core
  ☆17Updated last year
• Lingrui98 / RISC-V-book
  A translation project of the RISC-V reader
  ☆175Updated last year
• rustsbi / rustsbi-k210
  Kendryte K210 SBI support using RustSBI, provides privileged spec 1.12 environment by emulating it using 1.9.1
  ☆36Updated 11 months ago
• diodesign / diosix
  A lightweight, secure, multiprocessor bare-metal hypervisor written in Rust for RISC-V
  ☆193Updated 3 weeks ago
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆86Updated 4 years ago
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆53Updated last year
• ksco / rvemu
  A simple and fast RISC-V JIT emulator.
  ☆128Updated 5 months ago
• luojia65 / tiaoshi-dashi-sbi
  调试大师：你见过最强的内核调试器
  ☆35Updated 3 years ago
• ksco / chibicc-riscv
  A fork of chibicc ported to RISC-V assembly.
  ☆38Updated 2 years ago
• rcore-os / rcore-fs
  The file system module for rCore OS.
  ☆49Updated 7 months ago
• xen0n / larva
  PoC LoongArch - RISC-V emulator
  ☆30Updated last year
• rcore-os / riscv
  Low level access to RISCV processors
  ☆22Updated 2 years ago