Alternatives and similar repositories for terminus

Users that are interested in terminus are comparing it to the libraries listed below

• nbdd0121 / r2vm
  Rust RISC-V Virtual Machine
  ☆105Updated 8 months ago
• siriusdemon / Rare
  Build your own Riscv Emulator in Rust.
  ☆104Updated 2 years ago
• rustsbi / sbi-rt
  Simple RISC-V SBI runtime library; designated for supervisor use
  ☆23Updated last year
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆31Updated 3 years ago
• rustsbi / slides
  All public report slides, articles and meeting minutes related to RustSBI
  ☆29Updated last week
• KuangjuX / hypocaust
  hypocaust, a S-mode trap and emulate type-1 hypervisor run on RISC-V machine.
  ☆48Updated 2 years ago
• xen0n / larva
  PoC LoongArch - RISC-V emulator
  ☆32Updated last year
• riscv-rust / k210-hal
  Rust's hardware abstract layer (HAL) for K210 chip, a dual RV64GC SoC with hardware accelerated AI peripherals. Contributions welcomed!
  ☆71Updated last year
• rustsbi / rustsbi-k210
  Kendryte K210 SBI support using RustSBI, provides privileged spec 1.12 environment by emulating it using 1.9.1
  ☆37Updated last year
• rustsbi / plic
  Rust support for RISC-V Platform-Level Interrupt Controller
  ☆10Updated 2 years ago
• rustsbi / awesome-rustsbi
  A curated list of awesome things related to rustsbi
  ☆41Updated 2 years ago
• rustsbi / xuantie
  Low level access to T-Head Xuantie RISC-V processors
  ☆33Updated 6 months ago
• ksco / rvemu
  A simple and fast RISC-V JIT emulator.
  ☆142Updated 10 months ago
• rustsbi / rustsbi-hifive-unmatched
  RustSBI support on SiFive FU740 board; FU740 is a five-core heterogeneous processor with four SiFive U74 cores, and one SiFive S7 core
  ☆17Updated last year
• luojia65 / tiaoshi-dashi-sbi
  调试大师：你见过最强的内核调试器
  ☆35Updated 4 years ago
• michaelengel / xv6-d1
  Port of MIT's xv6 OS to the Nezha RISC-V board with Allwinner D1 SoC
  ☆104Updated 2 years ago
• luojia65 / test-d1-flash-bare
  Test run any program on D1 Nezha board flash
  ☆26Updated 2 years ago
• riscv / riscv-plic-spec
  PLIC Specification
  ☆142Updated 2 years ago
• rcore-os / RVM
  Rcore Virtual Machine
  ☆115Updated last year
• xiyurain / UltraOS
  A Rust based Multicore OS developed by UltraTeam, HITsz. Currently updated on https://gitee.com/LoanCold/ultraos_backup
  ☆46Updated last year
• twilco / riscv-from-scratch
  The code for the RISC-V from scratch blog post series.
  ☆92Updated 4 years ago
• nbdd0121 / muntjac-soc
  SoC for muntjac
  ☆12Updated 3 weeks ago
• chyyuu / zCore-Design
  ☆13Updated 3 years ago
• jwnhy / coffer
  Coffer is a RISC-V trusted execution environment developed in Rust.
  ☆20Updated 3 years ago
• rcore-os / rcore-user
  User programs for rCore OS
  ☆18Updated 3 years ago
• rustsbi / rustsbi-qemu
  QEMU platform SBI support implementation, using RustSBI
  ☆147Updated 8 months ago
• michaeljclark / busybear-linux
  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.
  ☆98Updated last year
• d0iasm / rvemu-for-book
  Reference implementation for the book "Writing a RISC-V Emulator in Rust".
  ☆383Updated 2 years ago
• rustsbi / rustsbi-tutorial
  rustsbi 开发教程
  ☆42Updated 2 years ago
• rcore-os / riscv
  Low level access to RISCV processors
  ☆22Updated 2 years ago