electronics-and-drives / SPAM
SKILL Package Manager
☆9Updated 5 years ago
Related projects ⓘ
Alternatives and complementary repositories for SPAM
- Cadence Virtuoso Design Management System☆33Updated 2 years ago
- A Python and SKILL Framework for Cadence Virtuoso☆33Updated 8 months ago
- Inter Process Communication (IPC) between Python and Cadence Virtuoso☆76Updated 7 years ago
- cdsAsync: An Asynchronous VLSI Toolset & Schematic Library☆25Updated 5 years ago
- A stochastic circuit optimizer for Cadence Virtuoso, using the NSGA-II genetic algorithm.☆11Updated 2 years ago
- Connect Cadence Virtuoso to a Python client using sockets.☆15Updated 4 years ago
- Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.☆38Updated 3 weeks ago
- Jupyter kernel for Cadence SKILL☆22Updated 7 years ago
- A python3 gm/ID starter kit☆39Updated 2 months ago
- Circuit Automatic Characterization Engine☆45Updated last week
- Files for Advanced Integrated Circuits☆26Updated 3 weeks ago
- Read Spectre PSF files☆51Updated this week
- A tiny Python package to parse spice raw data files.☆43Updated last year
- Verilog-A simulation models☆53Updated last week
- components and examples for creating radio ICs using the open skywater 130nm PDK☆17Updated 3 years ago
- Python interface to Cadence Virtuoso data☆14Updated 10 years ago
- KLayout technology files for Skywater SKY130☆38Updated last year
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆58Updated 3 weeks ago
- This repository is for (pre-)release versions of the Revolution EDA.☆35Updated 2 weeks ago
- Skill language interpreter☆58Updated 4 years ago
- PLL Designs on Skywater 130nm MPW☆20Updated 11 months ago
- This library is a low level parser for the OpenAccess file format.☆13Updated 7 years ago
- Advanced integrated circuits 2023☆29Updated 8 months ago
- Python script for generating lookup tables for the gm/ID design methodology and much more ...☆53Updated 8 months ago
- This library is an attempt to make transistor sizing for Analog design less painful.☆14Updated 11 months ago
- A simple MOSFET model with only 5-DC-parameters for circuit simulation☆39Updated 4 months ago
- Parametric layout generator for digital, analog and mixed-signal integrated circuits☆49Updated last week
- repository for a bandgap voltage reference in SKY130 technology☆34Updated last year
- Python port of Prof. Boris Murmann's gm/ID Starter Kit☆51Updated 7 years ago