Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.
☆40Jan 22, 2026Updated 4 months ago
Alternatives and similar repositories for myhdlpeek
Users that are interested in myhdlpeek are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A simple low-resource usage Kalman Filter using shared resources - in MyHDL☆10Oct 7, 2024Updated last year
- Verification Utilities for MyHDL☆17Oct 26, 2023Updated 2 years ago
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆21Jan 15, 2016Updated 10 years ago
- A collection of awesome MyHDL tutorials, projects and third-party tools.☆92Jul 7, 2021Updated 4 years ago
- A very simple UART implementation in MyHDL☆17Aug 21, 2014Updated 11 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- nMigen support for Xilinx Zynq devices☆15Nov 5, 2022Updated 3 years ago
- Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL☆36Sep 24, 2018Updated 7 years ago
- A tool for merging the MyHDL workflow with Vivado☆20May 13, 2020Updated 6 years ago
- A MyHDL library of basic design components, e.g. memory, fifo, multiplexor, de-multiplexor, arbiter, etc.☆17Feb 20, 2020Updated 6 years ago
- I want to learn [n]Migen.☆44Jan 26, 2020Updated 6 years ago
- FPGA code for NeTV2☆16Dec 3, 2018Updated 7 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Mar 4, 2023Updated 3 years ago
- A 6800 CPU written in nMigen☆49Jun 16, 2021Updated 4 years ago
- MyHDL hardware design language encased in the tasty PygMyHDL wrapper.☆19Jan 22, 2026Updated 4 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- System on Chip toolkit for nMigen☆19Apr 29, 2020Updated 6 years ago
- A collection of MyHDL cores and tools for complex digital circuit design☆87Dec 23, 2018Updated 7 years ago
- Library of componentes for PySpice☆13Oct 15, 2019Updated 6 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Updated this week
- Library of example SystemC/TLM peripherals for various SoCs based on the SCS library☆15May 17, 2026Updated last week
- VS Code based debugger for hardware designs in Amaranth or Verilog☆39Dec 3, 2024Updated last year
- This is a myhdl test environment for the open-cores jpeg_encoder.☆19Oct 23, 2016Updated 9 years ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆34Jul 15, 2024Updated last year
- CLI for WaveDrom☆69Feb 22, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Some assorted examples of nmigen designs☆19Nov 5, 2023Updated 2 years ago
- Experimental Lattice ECP5-driven Data Center Security Communication Module☆21Jul 22, 2024Updated last year
- A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA☆24Sep 2, 2023Updated 2 years ago
- A pipelined MIPS processor implemented in Python☆25Mar 31, 2016Updated 10 years ago
- ☆64Jul 21, 2020Updated 5 years ago
- LiteX project for the ButterStick bootloader☆14Mar 13, 2023Updated 3 years ago
- ☆29Apr 3, 2019Updated 7 years ago
- Kiri Docker project to run Kiri Revision Inspector inside a Docker container☆17Apr 7, 2025Updated last year
- Reed-Solomon Coding with Interleaving , available as a C program and python module.☆10Jun 2, 2015Updated 10 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- crap-o-scope scope implementation for icestick☆20Jun 1, 2018Updated 7 years ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆22May 18, 2026Updated last week
- A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen☆687Jan 8, 2022Updated 4 years ago
- Audio DSP on an FPGA using eurorack-pmod + LiteX with firmware in Rust.☆17Oct 7, 2025Updated 7 months ago
- FPGArduino binary☆13Aug 5, 2019Updated 6 years ago
- LiteX based FPGA gateware for Thunderscope.☆30Apr 21, 2026Updated last month
- ☆30Feb 4, 2021Updated 5 years ago