Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.
☆40Jan 22, 2026Updated last month
Alternatives and similar repositories for myhdlpeek
Users that are interested in myhdlpeek are comparing it to the libraries listed below
Sorting:
- Utilities for MyHDL☆19Dec 15, 2023Updated 2 years ago
- A simple low-resource usage Kalman Filter using shared resources - in MyHDL☆10Oct 7, 2024Updated last year
- Verification Utilities for MyHDL☆17Oct 26, 2023Updated 2 years ago
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆21Jan 15, 2016Updated 10 years ago
- A collection of awesome MyHDL tutorials, projects and third-party tools.☆93Jul 7, 2021Updated 4 years ago
- nMigen support for Xilinx Zynq devices☆15Nov 5, 2022Updated 3 years ago
- A very simple UART implementation in MyHDL☆17Aug 21, 2014Updated 11 years ago
- A library for generating Software Defined Radio-intended DSP code for FPGAs that makes use of the MyHDL (www.myhdl.org) Python library. T…☆25Aug 29, 2012Updated 13 years ago
- FPGA code for NeTV2☆15Dec 3, 2018Updated 7 years ago
- A pipelined, in-order, scalar VHDL implementation of the MRISC32 ISA☆24Sep 2, 2023Updated 2 years ago
- A 6800 CPU written in nMigen☆49Jun 16, 2021Updated 4 years ago
- Open source fpga project leveraging vtr CAD flow.☆26Mar 4, 2023Updated 3 years ago
- I want to learn [n]Migen.☆44Jan 26, 2020Updated 6 years ago
- Open source firmware for iCELink on iCESugar nano FPGA dev board.☆15Jul 3, 2022Updated 3 years ago
- A Python interface to the MAGMA libraries☆10Sep 3, 2016Updated 9 years ago
- Library of componentes for PySpice☆13Oct 15, 2019Updated 6 years ago
- A collection of MyHDL cores and tools for complex digital circuit design☆86Dec 23, 2018Updated 7 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆13Updated this week
- Kiri Docker project to run Kiri Revision Inspector inside a Docker container☆17Apr 7, 2025Updated 10 months ago
- This is mainly a simulation library of xilinx primitives that are verilator compatible.☆34Jul 15, 2024Updated last year
- Audio DSP on an FPGA using eurorack-pmod + LiteX with firmware in Rust.☆17Oct 7, 2025Updated 4 months ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆22Feb 11, 2026Updated 3 weeks ago
- This is a myhdl test environment for the open-cores jpeg_encoder.☆18Oct 23, 2016Updated 9 years ago
- Some assorted examples of nmigen designs☆19Nov 5, 2023Updated 2 years ago
- An oscilloscope program for COMEDI☆17Oct 9, 2024Updated last year
- Experimental Lattice ECP5-driven Data Center Security Communication Module☆20Jul 22, 2024Updated last year
- Documentation for SOF☆22Oct 17, 2025Updated 4 months ago
- crap-o-scope scope implementation for icestick☆20Jun 1, 2018Updated 7 years ago
- CRUVI Standard Specifications☆21May 6, 2024Updated last year
- sliding DFT for FPGA, targetting Lattice ICE40 1k☆76Apr 24, 2020Updated 5 years ago
- MyHDL hardware design language encased in the tasty PygMyHDL wrapper.☆19Jan 22, 2026Updated last month
- System on Chip toolkit for nMigen☆19Apr 29, 2020Updated 5 years ago
- A Pistorm CPU board replacement☆21Dec 7, 2024Updated last year
- 2-layer and 4-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.☆20Jan 6, 2026Updated last month
- Firmware for Blinkekatze, a replacement PCB to turn cat themed night-lights into interactive light displays☆24Oct 25, 2025Updated 4 months ago
- an inverter drawn in magic with makefile to simulate☆27Jun 30, 2022Updated 3 years ago
- A Text-Based Game Engine Made for Python☆15Aug 30, 2023Updated 2 years ago
- PCB for ULX4M FPGA R&D board☆59Apr 4, 2025Updated 11 months ago
- Open source SID 8580/6581 emulator that can be executed on Bluepill boards and STM32F103☆31Mar 22, 2025Updated 11 months ago