Alternatives and similar repositories for myhdlpeek

Users that are interested in myhdlpeek are comparing it to the libraries listed below

• udara28 / SDRAM_Controller
  Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)
  ☆21Updated 10 years ago
• m-labs / nmigen-soc
  System on Chip toolkit for nMigen
  ☆19Updated 5 years ago
• PyLCARS / PythonUberHDL
  Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL
  ☆36Updated 7 years ago
• wware / myblaze
  MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…
  ☆17Updated 12 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆39Updated 2 years ago
• jck / uhdl
  Utilities for MyHDL
  ☆19Updated 2 years ago
• amaranth-farm / amlib
  assorted library of utility cores for amaranth HDL
  ☆102Updated last year
• witchard / nbwavedrom
  A simple function to add wavedrom diagrams into an ipython notebook.
  ☆24Updated 4 years ago
• andrecp / myhdl_simple_uart
  A very simple UART implementation in MyHDL
  ☆17Updated 11 years ago
• lawrie / tiny_usb_examples
  Using the TinyFPGA BX USB code in user designs
  ☆52Updated 7 years ago
• olofk / observer
  ☆43Updated 5 years ago
• blackmesalabs / hyperram
  Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC
  ☆92Updated 7 years ago
• HarmonInstruments / verilog
  ☆20Updated 3 years ago
• hgomersall / Veriutils
  Verification Utilities for MyHDL
  ☆17Updated 2 years ago
• lambdaconcept / lambdasoc
  ☆44Updated 11 months ago
• drom / logidrom
  Digital Circuit rendering engine
  ☆39Updated 6 months ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆47Updated last year
• XekriRedmane / nmigen-exercises
  Graded exercises for nMigen (WIP)
  ☆55Updated 5 years ago
• hdl-util / sdram-controller
  Generic FPGA SDRAM controller, originally made for AS4C4M16SA
  ☆83Updated 5 years ago
• kbeckmann / pergola_projects
  My pergola FPGA projects
  ☆30Updated 4 years ago
• mattvenn / magic-inverter
  an inverter drawn in magic with makefile to simulate
  ☆27Updated 3 years ago
• haojunliu / OpenFPGA
  OpenFPGA
  ☆34Updated 7 years ago
• TUM-LIS / glip
  Generic Logic Interfacing Project
  ☆48Updated 5 years ago
• no2fpga / no2usb
  Nitro USB FPGA core
  ☆86Updated last year
• mcmayer / iCE40
  Lattice iCE40 FPGA experiments - Work in progress
  ☆106Updated 4 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 6 years ago
• cliffordwolf / icotools
  Tools and Examples for IcoBoard
  ☆80Updated 4 years ago
• ulx3s / fpga-odysseus
  FPGA Odysseus with ULX3S
  ☆69Updated 2 years ago
• stnolting / fpga_torture
  🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
  ☆32Updated 3 years ago
• XekriRedmane / n6800
  A 6800 CPU written in nMigen
  ☆49Updated 4 years ago