devbisme / myhdlpeekLinks
Monitor and display signal waveforms from your MyHDL/nMigen digital design in a Jupyter notebook.
☆40Updated last week
Alternatives and similar repositories for myhdlpeek
Users that are interested in myhdlpeek are comparing it to the libraries listed below
Sorting:
- Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)☆21Updated 10 years ago
- Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL☆36Updated 7 years ago
- Using the TinyFPGA BX USB code in user designs☆52Updated 6 years ago
- Utilities for MyHDL☆19Updated 2 years ago
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆24Updated 4 years ago
- A very simple UART implementation in MyHDL☆17Updated 11 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆47Updated last year
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated 2 years ago
- assorted library of utility cores for amaranth HDL☆100Updated last year
- OpenFPGA☆34Updated 7 years ago
- Verification Utilities for MyHDL☆17Updated 2 years ago
- A collection of MyHDL cores and tools for complex digital circuit design☆86Updated 7 years ago
- Generic Logic Interfacing Project☆48Updated 5 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆73Updated 4 years ago
- Lattice iCE40 FPGA experiments - Work in progress☆106Updated 4 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17Updated 12 years ago
- Verilog Modules for DSP functions and other common tasks to make FPGA development easier and more fun.☆20Updated 10 years ago
- Featherweight RISC-V implementation☆53Updated 4 years ago
- ☆61Updated 2 years ago
- I want to learn [n]Migen.☆44Updated 6 years ago
- an inverter drawn in magic with makefile to simulate☆27Updated 3 years ago
- Yosys Plugins☆22Updated 6 years ago
- ☆37Updated last year
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆45Updated 8 months ago
- ☆43Updated 5 years ago
- ☆47Updated 2 years ago
- Ultimate ECP5 development board☆115Updated 6 years ago
- Repository and Wiki for Chip Hack events.☆51Updated 4 years ago