davidel / pyxhdlLinks
Python Frontend For VHDL And Verilog
☆20Updated 4 months ago
Alternatives and similar repositories for pyxhdl
Users that are interested in pyxhdl are comparing it to the libraries listed below
Sorting:
- Simulate electronic circuit using Python and the Ngspice / Xyce simulators☆155Updated 2 years ago
- HDLGen-ChatGPT, works in tandem with ChatGPT chat interface to enable fast digital systems design and test specification capture, and aut…☆32Updated 10 months ago
- Example designs and documentation for the RPi Camera FMC☆21Updated 10 months ago
- A Python package to use FPGA development tools programmatically.☆139Updated 6 months ago
- Projects published on controlpaths.com and hackster.io☆41Updated 3 years ago
- FLIX-V: FPGA, Linux and RISC-V☆42Updated last year
- sump3 logic analyzer☆27Updated 2 weeks ago
- Combined ESP32C3 and iCE40 FPGA board☆70Updated 2 weeks ago
- High Speed Data Acquisition over HDMI - FPGA implementation☆46Updated 5 months ago
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆15Updated 6 months ago
- A proof-of-concept (hack) to implement neural network inference on a very tiny 8-bit microcontroller.☆72Updated last year
- LiteX based FPGA gateware for Thunderscope.☆25Updated last week
- A basic Soft(Gate)ware Defined Radio architecture☆94Updated last year
- command line tool for frequent amaranth HDL tasks (generate sources, show design)☆15Updated 3 years ago
- ☆43Updated 2 years ago
- ☆29Updated last year
- FPGA examples on Google Colab☆27Updated last month
- Silicon Layout Wizard☆182Updated this week
- Gateware for USB2Sniffer☆30Updated 4 years ago
- Blender FastHenry - FastHenry simulations in Blender☆72Updated last month
- Open Source FPGA toolchain and documentation for QuickLogic devices and eFPGA IP☆40Updated 4 years ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆109Updated last year
- LiteX development baseboards arround the SQRL Acorn.☆69Updated 6 months ago
- Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.☆151Updated 4 years ago
- Tutorials centred around Gowin FPGA parts for the /r/GowinFPGA subreddit☆58Updated last year
- assorted library of utility cores for amaranth HDL☆96Updated last year
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆106Updated 2 weeks ago
- Generate Verilog code from a KiCad netlist☆61Updated 10 months ago
- Documenting the Lattice ECP5 bit-stream format.☆56Updated 2 years ago
- ☆36Updated last year