davidel / pyxhdl
Python Frontend For VHDL And Verilog
☆18Updated 2 months ago
Alternatives and similar repositories for pyxhdl:
Users that are interested in pyxhdl are comparing it to the libraries listed below
- sump3 logic analyzer☆19Updated this week
- Open Source FPGA toolchain and documentation for QuickLogic devices and eFPGA IP☆38Updated 3 years ago
- iCEstick iCE40-HX1K FPGA hacks ~ iCEfm FM Transmitter☆18Updated 7 years ago
- ☆40Updated 2 years ago
- A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, …☆43Updated last year
- Projects published on controlpaths.com and hackster.io☆40Updated 2 years ago
- 100% open source dev kit for EOS S3 MCU+eFPGA SoC supported by fully open source SDK and FPGA Toolchain☆60Updated 3 years ago
- A simple function to add wavedrom diagrams into an ipython notebook.☆22Updated 3 years ago
- command line tool for frequent amaranth HDL tasks (generate sources, show design)☆12Updated 3 years ago
- FLIX-V: FPGA, Linux and RISC-V☆41Updated last year
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆29Updated 4 months ago
- GUI editor for hardware description designs☆28Updated last year
- A Python package to use FPGA development tools programmatically.☆129Updated last month
- ☆35Updated 7 months ago
- Example projects for Quokka FPGA toolkit☆37Updated 2 years ago
- RISC-V Processor written in Amaranth HDL☆37Updated 3 years ago
- openEMS High-level layer☆18Updated last month
- micro version of cocotb, to run on microcontrollers or desktop to get hardware in the loop☆13Updated 2 months ago
- SAR ADC on tiny tapeout☆38Updated 2 months ago
- Design to connect Lattice Ultraplus FPGA to LH154Q01 Display☆28Updated 6 years ago
- Simulate electronic circuit using Python and the Ngspice / Xyce simulators☆154Updated 2 years ago
- Files and documentation for Pico-Dirty-Blaster Workshop☆17Updated 10 months ago
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆90Updated 7 months ago
- Siglent SDS1x0xX-E FPGA bitstreams☆41Updated 4 months ago
- A fully-integrated FT8 protocol receiver on 130nm CMOS☆60Updated 2 years ago
- Dockerized FPGA toolchains containing openxc7, f4pga, vivado and more☆13Updated 3 weeks ago
- Portable Verilog RTL interface to S27KL0641DABHI020 64Mbit HyperRAM IC☆86Updated 6 years ago
- KiCad Library to make it easy to create both host boards and expansion boards and which are compatible with the Digilent "PMOD" specifica…☆38Updated 4 years ago
- assorted library of utility cores for amaranth HDL☆87Updated 7 months ago
- Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm☆33Updated 6 years ago