Alternatives and similar repositories for bootloader_recovery

Users that are interested in bootloader_recovery are comparing it to the libraries listed below

• starfive-tech / JH7100_ddrinit
  ☆16Updated 3 years ago
• starfive-tech / JH7100_secondBoot
  ☆14Updated 3 years ago
• starfive-tech / opensbi
  ☆18Updated last month
• kprasadvnsi / JH71xx-tools
  Bootloader recovery and updater tool for StarFive JH71x0 SoCs.
  ☆15Updated 3 years ago
• starfive-tech / u-boot
  ☆46Updated last month
• starfive-tech / freelight-u-sdk
  ☆28Updated 2 years ago
• starfive-tech / Tools
  ☆20Updated last year
• starfive-tech / JH7100_Docs
  ☆61Updated 3 years ago
• sifiveinc / meta-sifive
  SiFive OpenEmbedded / Yocto BSP Layer
  ☆52Updated 2 weeks ago
• riscv-non-isa / riscv-device-tree-doc
  RISC-V Specific Device Tree Documentation
  ☆42Updated 11 months ago
• starfive-tech / Fedora_on_StarFive
  ☆63Updated 2 years ago
• antmicro / renode-beagle-v
  ☆12Updated last year
• opencomputeproject / OSF-OSFCI
  Open Source Firmware Continuous Integration source code
  ☆23Updated 6 months ago
• openhwgroup / core-v-sw
  Main Repo for the OpenHW Group Software Task Group
  ☆17Updated 3 months ago
• tock / tock-bootloader
  Software bootloader for boards running Tock.
  ☆27Updated last year
• riscv-non-isa / riscv-brs
  The Boot and Runtime Services (BRS) specification provides the software requirements for system vendors and Operating System Vendors (OSV…
  ☆49Updated last week
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆38Updated 7 months ago
• FlorentRevest / vscode-patchwork
  VSCode extension to interface with Patchwork
  ☆11Updated last year
• litex-hub / pythondata-cpu-rocket
  Python module containing verilog files for rocket cpu (for use with LiteX).
  ☆14Updated last month
• nathanrossi / meta-hdl
  HDL tools layer for OpenEmbedded
  ☆17Updated 8 months ago
• riscvarchive / riscv-edk2-platforms
  Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
  ☆18Updated 3 years ago
• riscvarchive / riscv-edk2
  Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
  ☆24Updated 3 years ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆71Updated this week
• Wren6991 / ChristmasSoC
  Dual-core RISC-V SoC with JTAG, atomics, SDRAM
  ☆25Updated 3 years ago
• starfive-tech / meta-starfive
  StarFive OpenEmbedded Layer
  ☆16Updated 3 months ago
• amaranth-lang / amaranth-yosys
  WebAssembly-based Yosys distribution for Amaranth HDL
  ☆27Updated this week
• trabucayre / quickfeather-notes
  Notes, scripts and apps to quickfeather board
  ☆10Updated 3 years ago
• sipeed / bl602-hal
  Hardware Abstract Layer for BL602 RISC-V WiFi + BLE SoC in embedded Rust
  ☆78Updated last year
• open-power / pdbg
  PowerPC FSI Debugger
  ☆18Updated last week
• tomtor / rust-litex
  Running Rust on the (Linux) Litex VexRiscv FPGA SOC
  ☆13Updated 3 weeks ago