Alternatives and similar repositories for Kalman-Filter-verilog

Users that are interested in Kalman-Filter-verilog are comparing it to the libraries listed below

• fengyulin1996 / Verilog-DSP
  FIR，FFT based on Verilog
  ☆13Updated 7 years ago
• freecores / wdsp
  DSP WishBone Compatible Cores
  ☆13Updated 10 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆30Updated 3 years ago
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆18Updated 12 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆17Updated 5 years ago
• liuguangxi / gng
  Gaussian noise generator Verilog IP core
  ☆31Updated last year
• yaseensalah / Digital-Design-of-FIR-Filter
  Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…
  ☆23Updated 2 years ago
• edwardclin2003 / LowPassFilterImageFPGA
  Verilog code that does 2D Low Pass Filter on a greyscale image
  ☆10Updated 9 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 2 years ago
• Angelic47 / GowinDDR3_AXI4_SpinalHDL
  Gowin DDR3 Controller with AXI4 Implementation | 高云DDR3内存控制器AXI4接口实现
  ☆24Updated last year
• freecores / wb_dma
  WISHBONE DMA/Bridge IP Core
  ☆18Updated 10 years ago
• open-dv / dma_axi
  ☆16Updated 6 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆57Updated 2 years ago
• mesarcik / DRFM
  Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"
  ☆27Updated 3 years ago
• cterrill26 / FPGA_AudioVisualizer
  Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…
  ☆15Updated 4 years ago
• FeldmeierMichael / MIPI_CSI_2
  ☆14Updated last year
• mwrnd / innova2_xcku15p_ddr4_bram_gpio
  XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
  ☆18Updated last year
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆20Updated 4 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆14Updated 4 years ago
• mnmhdanas / DA-Based-LMS-Adaptive-filter
  Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…
  ☆15Updated 3 years ago
• benreynwar / fpga-sdrlib
  Verilog modules for software-defined radio.
  ☆18Updated 12 years ago
• AbdullahAnsarii / BandPassFilter
  FIR band-pass filter using Verilog HDL.
  ☆11Updated 4 years ago
• amsacks / OV7670-camera
  A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …
  ☆15Updated 2 years ago
• nandland / memory
  Single Port RAM, Dual Port RAM, FIFO
  ☆24Updated 2 years ago
• hkhajanchi / fpga-pid
  Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA
  ☆32Updated 4 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆47Updated 5 years ago
• sopynq / huffman-encoding-core
  Huffman encoding core (Vivado HLS Project)
  ☆12Updated 5 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆23Updated 5 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆42Updated 8 years ago
• enjoy-digital / litex_verilog_axi_test
  Integration test of Verilog AXI modules (https://github.com/alexforencich/verilog-axi) with LiteX.
  ☆16Updated 2 years ago